Delta-sigma modulation in fractional-N frequency synthesis
A description is given of a delta-sigma ( Delta - Sigma ) modulation and fractional-N frequency division technique for performing indirect digital frequency synthesis using a phase-locked loop (PLL). The use of Delta - Sigma modulation concepts results in beneficial shaping of the phase noise (jitte...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 1993-05, Vol.28 (5), p.553-559 |
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| container_end_page | 559 |
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| container_issue | 5 |
| container_start_page | 553 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 28 |
| creator | Riley, T.A.D. Copeland, M.A. Kwasniewski, T.A. |
| description | A description is given of a delta-sigma ( Delta - Sigma ) modulation and fractional-N frequency division technique for performing indirect digital frequency synthesis using a phase-locked loop (PLL). The use of Delta - Sigma modulation concepts results in beneficial shaping of the phase noise (jitter) introduced by fractional-N division. The technique has the potential to provide low phase noise, fast settling time, and reduced impact of spurious frequencies when compared with existing fractional-N PLL techniques.< > |
| doi_str_mv | 10.1109/4.229400 |
| format | Article |
| fullrecord | <record><control><sourceid>pascalfrancis_RIE</sourceid><recordid>TN_cdi_pascalfrancis_primary_4789847</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>229400</ieee_id><sourcerecordid>4789847</sourcerecordid><originalsourceid>FETCH-LOGICAL-c273t-c8cb7529599542b5119daf5830c988a22a5fa3ec048b462adee4c0f77533b0273</originalsourceid><addsrcrecordid>eNo9jztLxEAUhQdRMK6CtVUKC5tZ77zMjJ3s-oJFGwW7cDOZ0ZE81ky2yL83IctW9x7OxweHkEsGS8bA3Mol50YCHJGEKaUpy8TXMUkAmKaGA5ySsxh_xyilZgm5X7uqRxrDd41p3Za7CvvQNmloUt-hnX6s6NsY3N_ONXZI49D0Py6GeE5OPFbRXezvgnw-PX6sXujm_fl19bChlmeip1bbIlPcKGOU5IVizJTolRZgjdbIOSqPwlmQupB3HEvnpAWfZUqIAkbFgtzMXtu1MXbO59su1NgNOYN82pzLfN48otczusVosRoXNDbEAy8zbbScjFczFpxzh3bv-Ae4NF1r</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Delta-sigma modulation in fractional-N frequency synthesis</title><source>IEEE Electronic Library (IEL)</source><creator>Riley, T.A.D. ; Copeland, M.A. ; Kwasniewski, T.A.</creator><creatorcontrib>Riley, T.A.D. ; Copeland, M.A. ; Kwasniewski, T.A.</creatorcontrib><description>A description is given of a delta-sigma ( Delta - Sigma ) modulation and fractional-N frequency division technique for performing indirect digital frequency synthesis using a phase-locked loop (PLL). The use of Delta - Sigma modulation concepts results in beneficial shaping of the phase noise (jitter) introduced by fractional-N division. The technique has the potential to provide low phase noise, fast settling time, and reduced impact of spurious frequencies when compared with existing fractional-N PLL techniques.< ></description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.229400</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Bandwidth ; Channel spacing ; Circuit properties ; Delta-sigma modulation ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronics ; Exact sciences and technology ; Filters ; Frequency conversion ; Frequency synthesizers ; Integrated circuit synthesis ; Oscillators, resonators, synthetizers ; Phase locked loops ; Phase noise ; Voltage-controlled oscillators</subject><ispartof>IEEE journal of solid-state circuits, 1993-05, Vol.28 (5), p.553-559</ispartof><rights>1993 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c273t-c8cb7529599542b5119daf5830c988a22a5fa3ec048b462adee4c0f77533b0273</citedby><cites>FETCH-LOGICAL-c273t-c8cb7529599542b5119daf5830c988a22a5fa3ec048b462adee4c0f77533b0273</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/229400$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54736</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/229400$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=4789847$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Riley, T.A.D.</creatorcontrib><creatorcontrib>Copeland, M.A.</creatorcontrib><creatorcontrib>Kwasniewski, T.A.</creatorcontrib><title>Delta-sigma modulation in fractional-N frequency synthesis</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A description is given of a delta-sigma ( Delta - Sigma ) modulation and fractional-N frequency division technique for performing indirect digital frequency synthesis using a phase-locked loop (PLL). The use of Delta - Sigma modulation concepts results in beneficial shaping of the phase noise (jitter) introduced by fractional-N division. The technique has the potential to provide low phase noise, fast settling time, and reduced impact of spurious frequencies when compared with existing fractional-N PLL techniques.< ></description><subject>Applied sciences</subject><subject>Bandwidth</subject><subject>Channel spacing</subject><subject>Circuit properties</subject><subject>Delta-sigma modulation</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Filters</subject><subject>Frequency conversion</subject><subject>Frequency synthesizers</subject><subject>Integrated circuit synthesis</subject><subject>Oscillators, resonators, synthetizers</subject><subject>Phase locked loops</subject><subject>Phase noise</subject><subject>Voltage-controlled oscillators</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1993</creationdate><recordtype>article</recordtype><recordid>eNo9jztLxEAUhQdRMK6CtVUKC5tZ77zMjJ3s-oJFGwW7cDOZ0ZE81ky2yL83IctW9x7OxweHkEsGS8bA3Mol50YCHJGEKaUpy8TXMUkAmKaGA5ySsxh_xyilZgm5X7uqRxrDd41p3Za7CvvQNmloUt-hnX6s6NsY3N_ONXZI49D0Py6GeE5OPFbRXezvgnw-PX6sXujm_fl19bChlmeip1bbIlPcKGOU5IVizJTolRZgjdbIOSqPwlmQupB3HEvnpAWfZUqIAkbFgtzMXtu1MXbO59su1NgNOYN82pzLfN48otczusVosRoXNDbEAy8zbbScjFczFpxzh3bv-Ae4NF1r</recordid><startdate>19930501</startdate><enddate>19930501</enddate><creator>Riley, T.A.D.</creator><creator>Copeland, M.A.</creator><creator>Kwasniewski, T.A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>19930501</creationdate><title>Delta-sigma modulation in fractional-N frequency synthesis</title><author>Riley, T.A.D. ; Copeland, M.A. ; Kwasniewski, T.A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c273t-c8cb7529599542b5119daf5830c988a22a5fa3ec048b462adee4c0f77533b0273</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1993</creationdate><topic>Applied sciences</topic><topic>Bandwidth</topic><topic>Channel spacing</topic><topic>Circuit properties</topic><topic>Delta-sigma modulation</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Filters</topic><topic>Frequency conversion</topic><topic>Frequency synthesizers</topic><topic>Integrated circuit synthesis</topic><topic>Oscillators, resonators, synthetizers</topic><topic>Phase locked loops</topic><topic>Phase noise</topic><topic>Voltage-controlled oscillators</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Riley, T.A.D.</creatorcontrib><creatorcontrib>Copeland, M.A.</creatorcontrib><creatorcontrib>Kwasniewski, T.A.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Riley, T.A.D.</au><au>Copeland, M.A.</au><au>Kwasniewski, T.A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Delta-sigma modulation in fractional-N frequency synthesis</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1993-05-01</date><risdate>1993</risdate><volume>28</volume><issue>5</issue><spage>553</spage><epage>559</epage><pages>553-559</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A description is given of a delta-sigma ( Delta - Sigma ) modulation and fractional-N frequency division technique for performing indirect digital frequency synthesis using a phase-locked loop (PLL). The use of Delta - Sigma modulation concepts results in beneficial shaping of the phase noise (jitter) introduced by fractional-N division. The technique has the potential to provide low phase noise, fast settling time, and reduced impact of spurious frequencies when compared with existing fractional-N PLL techniques.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/4.229400</doi><tpages>7</tpages></addata></record> |
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| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 1993-05, Vol.28 (5), p.553-559 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_pascalfrancis_primary_4789847 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Bandwidth Channel spacing Circuit properties Delta-sigma modulation Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Filters Frequency conversion Frequency synthesizers Integrated circuit synthesis Oscillators, resonators, synthetizers Phase locked loops Phase noise Voltage-controlled oscillators |
| title | Delta-sigma modulation in fractional-N frequency synthesis |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T13%3A48%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Delta-sigma%20modulation%20in%20fractional-N%20frequency%20synthesis&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Riley,%20T.A.D.&rft.date=1993-05-01&rft.volume=28&rft.issue=5&rft.spage=553&rft.epage=559&rft.pages=553-559&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/4.229400&rft_dat=%3Cpascalfrancis_RIE%3E4789847%3C/pascalfrancis_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=229400&rfr_iscdi=true |