Design of self-diagnostic boards by multiple signature analysis
A new design approach, based on multiple signature analysis, for self-diagnostic boards is presented. For this approach, test responses from all chips on the board are compressed into space-time signatures using nonbinary multiple error-correcting codes, and faulty chips are identified by analyzing...
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| Veröffentlicht in: | IEEE transactions on computers 1993-09, Vol.42 (9), p.1035-1044 |
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| container_end_page | 1044 |
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| container_issue | 9 |
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| container_title | IEEE transactions on computers |
| container_volume | 42 |
| creator | Karpovsky, M.G. Chaudhry, S.M. |
| description | A new design approach, based on multiple signature analysis, for self-diagnostic boards is presented. For this approach, test responses from all chips on the board are compressed into space-time signatures using nonbinary multiple error-correcting codes, and faulty chips are identified by analyzing relations between distortions in these signatures. This approach results in a considerable reduction of a hardware overhead, required for diagnostics, as compared with the straightforward approach where separate signatures are computed for each chip on the board. The diagnostic approach presented can also be used for identification of faulty boards in a system or for faulty processors in a multiprocessor environment.< > |
| doi_str_mv | 10.1109/12.241593 |
| format | Article |
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For this approach, test responses from all chips on the board are compressed into space-time signatures using nonbinary multiple error-correcting codes, and faulty chips are identified by analyzing relations between distortions in these signatures. This approach results in a considerable reduction of a hardware overhead, required for diagnostics, as compared with the straightforward approach where separate signatures are computed for each chip on the board. The diagnostic approach presented can also be used for identification of faulty boards in a system or for faulty processors in a multiprocessor environment.< ></description><identifier>ISSN: 0018-9340</identifier><identifier>EISSN: 1557-9956</identifier><identifier>DOI: 10.1109/12.241593</identifier><identifier>CODEN: ITCOB4</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Algorithm design and analysis ; Applied sciences ; Automatic testing ; Built-in self-test ; Design. Technologies. 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For this approach, test responses from all chips on the board are compressed into space-time signatures using nonbinary multiple error-correcting codes, and faulty chips are identified by analyzing relations between distortions in these signatures. This approach results in a considerable reduction of a hardware overhead, required for diagnostics, as compared with the straightforward approach where separate signatures are computed for each chip on the board. The diagnostic approach presented can also be used for identification of faulty boards in a system or for faulty processors in a multiprocessor environment.< ></description><subject>Algorithm design and analysis</subject><subject>Applied sciences</subject><subject>Automatic testing</subject><subject>Built-in self-test</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Error correction codes</subject><subject>Exact sciences and technology</subject><subject>Fault diagnosis</subject><subject>Hardware</subject><subject>Integrated circuits</subject><subject>Linear feedback shift registers</subject><subject>Pattern analysis</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Technologies. Operation analysis. Testing</topic><topic>Electronics</topic><topic>Error correction codes</topic><topic>Exact sciences and technology</topic><topic>Fault diagnosis</topic><topic>Hardware</topic><topic>Integrated circuits</topic><topic>Linear feedback shift registers</topic><topic>Pattern analysis</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. 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| ispartof | IEEE transactions on computers, 1993-09, Vol.42 (9), p.1035-1044 |
| issn | 0018-9340 1557-9956 |
| language | eng |
| recordid | cdi_pascalfrancis_primary_3941143 |
| source | IEEE Electronic Library (IEL) |
| subjects | Algorithm design and analysis Applied sciences Automatic testing Built-in self-test Design. Technologies. Operation analysis. Testing Electronics Error correction codes Exact sciences and technology Fault diagnosis Hardware Integrated circuits Linear feedback shift registers Pattern analysis Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Sequential analysis Test pattern generators |
| title | Design of self-diagnostic boards by multiple signature analysis |
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