Sub-20 ps high-speed ECL bipolar transistor with low parasitic architecture: Bipolar BiCMOS/CMOS devices and technologies

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Veröffentlicht in:IEEE transactions on electron devices 1995, Vol.42 (3), p.399-405
Hauptverfasser: IINUMA, T, ITOH, N, NAKAJIMA, H, INOU, K, MATSUDA, S, YOSHINO, C, TSUBOI, Y, KATSUMATA, Y, IWAI, H
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container_title IEEE transactions on electron devices
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creator IINUMA, T
ITOH, N
NAKAJIMA, H
INOU, K
MATSUDA, S
YOSHINO, C
TSUBOI, Y
KATSUMATA, Y
IWAI, H
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ispartof IEEE transactions on electron devices, 1995, Vol.42 (3), p.399-405
issn 0018-9383
1557-9646
language eng
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source IEEE Electronic Library (IEL)
subjects Applied sciences
Electronics
Exact sciences and technology
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Transistors
title Sub-20 ps high-speed ECL bipolar transistor with low parasitic architecture: Bipolar BiCMOS/CMOS devices and technologies
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