A 2.2 W, 80 MHz superscalar RISC microprocessor

A 28 mW/MHz at 80 MHz structured-custom RISC microprocessor design is described. This 32-b implementation of the PowerPC architecture is fabricated in a 3.3 V, 0.5 /spl mu/m, 4-level metal CMOS technology, resulting in 1.6 million transistors in a 7.4 mm by 11.5 mm chip size. Dual 8-kilobyte instruc...

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Veröffentlicht in:	IEEE journal of solid-state circuits 1994-12, Vol.29 (12), p.1440-1454
Hauptverfasser:	Gerosa, G., Gary, S., Dietz, C., Dac Pham, Hoover, K., Alvarez, J., Sanchez, H., Ippolito, P., Tai Ngo, Litch, S., Eno, J., Golab, J., Vanderschaaf, N., Kahle, J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Central Processing Unit Clocks CMOS technology Control systems Electronics Energy management Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Microprocessors Power dissipation Power system management Reduced instruction set computing Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices System buses
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