N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit Applications
Analog behaviors of n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with dual-workfunction-gate (DWFG) structure are presented. The gate of the n-channel DWFG MOSFET is composed of p + and n + poly-Si along the channel carrier flowing direction. To investigate the impact of th...
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| Veröffentlicht in: | IEEE transactions on electron devices 2012-12, Vol.59 (12), p.3273-3279 |
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| creator | NA, Kee-Yeol BAEK, Ki-Ju KIM, Yeong-Seuk |
| description | Analog behaviors of n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with dual-workfunction-gate (DWFG) structure are presented. The gate of the n-channel DWFG MOSFET is composed of p + and n + poly-Si along the channel carrier flowing direction. To investigate the impact of the proportional length of p- and n-type-doped poly-Si on analog behaviors, they are varied within a total physical gate length of 1.0 μm. Various dc characteristics that directly affect analog circuit performances are evaluated from the fabricated devices: I - V characteristics, drain-induced barrier lowering, transconductance ( gm ), drain conductance ( g ds = 1/ r out ), intrinsic gain ( AV = gm / g ds ), and Early voltage ( V EA = ID / g ds ). From the measurements, the DWFG devices always show improved characteristics over conventional devices (n + -doped poly-Si gate). The DWFG device with the shortest p + poly-Si gate length ( p / n = 0.4/0.6) shows better gm characteristics than other DWFG devices. The g ds characteristics of the fabricated DWFG devices are improved as the length of the p + poly-Si increases. The best AV and V EA are taken from the device with a p-type-doped poly-Si length of 0.7 μm ( p / n = 0.7/0.3). |
| doi_str_mv | 10.1109/TED.2012.2219865 |
| format | Article |
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The gate of the n-channel DWFG MOSFET is composed of p + and n + poly-Si along the channel carrier flowing direction. To investigate the impact of the proportional length of p- and n-type-doped poly-Si on analog behaviors, they are varied within a total physical gate length of 1.0 μm. Various dc characteristics that directly affect analog circuit performances are evaluated from the fabricated devices: I - V characteristics, drain-induced barrier lowering, transconductance ( gm ), drain conductance ( g ds = 1/ r out ), intrinsic gain ( AV = gm / g ds ), and Early voltage ( V EA = ID / g ds ). From the measurements, the DWFG devices always show improved characteristics over conventional devices (n + -doped poly-Si gate). The DWFG device with the shortest p + poly-Si gate length ( p / n = 0.4/0.6) shows better gm characteristics than other DWFG devices. The g ds characteristics of the fabricated DWFG devices are improved as the length of the p + poly-Si increases. The best AV and V EA are taken from the device with a p-type-doped poly-Si length of 0.7 μm ( p / n = 0.7/0.3).</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2012.2219865</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Analog circuit ; Analog circuits ; Applied sciences ; channel length modulation (CLM) ; Circuit properties ; Condensed matter: electronic structure, electrical, magnetic, and optical properties ; drain conductance (g_{\rm ds}) ; drain-induced barrier lowering (DIBL) ; dual workfunction gate (DWFG) ; Early voltage (V_{\rm EA}) ; Electric potential ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures ; Electronics ; Exact sciences and technology ; intrinsic gain (A_{V}) ; Ion implantation ; Junctions ; Logic gates ; MOSFET circuits ; Performance evaluation ; Physics ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Surface double layers, schottky barriers, and work functions ; transconductance (g_{m}) ; Transistors</subject><ispartof>IEEE transactions on electron devices, 2012-12, Vol.59 (12), p.3273-3279</ispartof><rights>2014 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-8c4c8398c9200f72f1402fe4b86486abec1c6cdbcb9bc0e48fc450a970af06b43</citedby><cites>FETCH-LOGICAL-c293t-8c4c8398c9200f72f1402fe4b86486abec1c6cdbcb9bc0e48fc450a970af06b43</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6352883$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54736</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6352883$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=26690924$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>NA, Kee-Yeol</creatorcontrib><creatorcontrib>BAEK, Ki-Ju</creatorcontrib><creatorcontrib>KIM, Yeong-Seuk</creatorcontrib><title>N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit Applications</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>Analog behaviors of n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with dual-workfunction-gate (DWFG) structure are presented. The gate of the n-channel DWFG MOSFET is composed of p + and n + poly-Si along the channel carrier flowing direction. To investigate the impact of the proportional length of p- and n-type-doped poly-Si on analog behaviors, they are varied within a total physical gate length of 1.0 μm. Various dc characteristics that directly affect analog circuit performances are evaluated from the fabricated devices: I - V characteristics, drain-induced barrier lowering, transconductance ( gm ), drain conductance ( g ds = 1/ r out ), intrinsic gain ( AV = gm / g ds ), and Early voltage ( V EA = ID / g ds ). From the measurements, the DWFG devices always show improved characteristics over conventional devices (n + -doped poly-Si gate). The DWFG device with the shortest p + poly-Si gate length ( p / n = 0.4/0.6) shows better gm characteristics than other DWFG devices. The g ds characteristics of the fabricated DWFG devices are improved as the length of the p + poly-Si increases. The best AV and V EA are taken from the device with a p-type-doped poly-Si length of 0.7 μm ( p / n = 0.7/0.3).</description><subject>Analog circuit</subject><subject>Analog circuits</subject><subject>Applied sciences</subject><subject>channel length modulation (CLM)</subject><subject>Circuit properties</subject><subject>Condensed matter: electronic structure, electrical, magnetic, and optical properties</subject><subject>drain conductance (g_{\rm ds})</subject><subject>drain-induced barrier lowering (DIBL)</subject><subject>dual workfunction gate (DWFG)</subject><subject>Early voltage (V_{\rm EA})</subject><subject>Electric potential</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>intrinsic gain (A_{V})</subject><subject>Ion implantation</subject><subject>Junctions</subject><subject>Logic gates</subject><subject>MOSFET circuits</subject><subject>Performance evaluation</subject><subject>Physics</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Surface double layers, schottky barriers, and work functions</subject><subject>transconductance (g_{m})</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kD1PwzAURS0EEqWwI7FkYXR5_ohrj1UKBanQgSLGyHnYYAhJZKcD_55ErTo9Xb177nAIuWYwYwzM3fZ-OePA-IxzZrTKT8iE5fmcGiXVKZkAME2N0OKcXKT0PUQlJZ-Q1QstvmzTuDpb7mxN39v443cN9qFt6Mr2LnvevD7cbzPfxmzR2Lr9zIoQcRf6bNF1dUA7VtMlOfO2Tu7qcKfkbaCKR7rerJ6KxZoiN6KnGiVqYTQaDuDn3DMJ3DtZaSW1spVDhgo_KqxMheCk9ihzsGYO1oOqpJgS2O9ibFOKzpddDL82_pUMylFEOYgoRxHlQcSA3O6Rzia0tY-2wZCOHFfKgOHj9M2-F5xzx7cSOddaiH_WnmYA</recordid><startdate>20121201</startdate><enddate>20121201</enddate><creator>NA, Kee-Yeol</creator><creator>BAEK, Ki-Ju</creator><creator>KIM, Yeong-Seuk</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20121201</creationdate><title>N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit Applications</title><author>NA, Kee-Yeol ; BAEK, Ki-Ju ; KIM, Yeong-Seuk</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c293t-8c4c8398c9200f72f1402fe4b86486abec1c6cdbcb9bc0e48fc450a970af06b43</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Analog circuit</topic><topic>Analog circuits</topic><topic>Applied sciences</topic><topic>channel length modulation (CLM)</topic><topic>Circuit properties</topic><topic>Condensed matter: electronic structure, electrical, magnetic, and optical properties</topic><topic>drain conductance (g_{\rm ds})</topic><topic>drain-induced barrier lowering (DIBL)</topic><topic>dual workfunction gate (DWFG)</topic><topic>Early voltage (V_{\rm EA})</topic><topic>Electric potential</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>intrinsic gain (A_{V})</topic><topic>Ion implantation</topic><topic>Junctions</topic><topic>Logic gates</topic><topic>MOSFET circuits</topic><topic>Performance evaluation</topic><topic>Physics</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Surface double layers, schottky barriers, and work functions</topic><topic>transconductance (g_{m})</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>NA, Kee-Yeol</creatorcontrib><creatorcontrib>BAEK, Ki-Ju</creatorcontrib><creatorcontrib>KIM, Yeong-Seuk</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NA, Kee-Yeol</au><au>BAEK, Ki-Ju</au><au>KIM, Yeong-Seuk</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit Applications</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2012-12-01</date><risdate>2012</risdate><volume>59</volume><issue>12</issue><spage>3273</spage><epage>3279</epage><pages>3273-3279</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>Analog behaviors of n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with dual-workfunction-gate (DWFG) structure are presented. The gate of the n-channel DWFG MOSFET is composed of p + and n + poly-Si along the channel carrier flowing direction. To investigate the impact of the proportional length of p- and n-type-doped poly-Si on analog behaviors, they are varied within a total physical gate length of 1.0 μm. Various dc characteristics that directly affect analog circuit performances are evaluated from the fabricated devices: I - V characteristics, drain-induced barrier lowering, transconductance ( gm ), drain conductance ( g ds = 1/ r out ), intrinsic gain ( AV = gm / g ds ), and Early voltage ( V EA = ID / g ds ). From the measurements, the DWFG devices always show improved characteristics over conventional devices (n + -doped poly-Si gate). The DWFG device with the shortest p + poly-Si gate length ( p / n = 0.4/0.6) shows better gm characteristics than other DWFG devices. The g ds characteristics of the fabricated DWFG devices are improved as the length of the p + poly-Si increases. The best AV and V EA are taken from the device with a p-type-doped poly-Si length of 0.7 μm ( p / n = 0.7/0.3).</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2012.2219865</doi><tpages>7</tpages></addata></record> |
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| subjects | Analog circuit Analog circuits Applied sciences channel length modulation (CLM) Circuit properties Condensed matter: electronic structure, electrical, magnetic, and optical properties drain conductance (g_{\rm ds}) drain-induced barrier lowering (DIBL) dual workfunction gate (DWFG) Early voltage (V_{\rm EA}) Electric potential Electric, optical and optoelectronic circuits Electronic circuits Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures Electronics Exact sciences and technology intrinsic gain (A_{V}) Ion implantation Junctions Logic gates MOSFET circuits Performance evaluation Physics Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Surface double layers, schottky barriers, and work functions transconductance (g_{m}) Transistors |
| title | N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit Applications |
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