Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs
Based on the stress extraction and measurement by the atomic-force-microscope-Raman technique with nanometer-level space resolution, the high compressive stress about 700 MPa on the Si critical dimension (CD) is observed in the current complementary metal-oxide-semiconductor (CMOS) transistor. The d...
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description | Based on the stress extraction and measurement by the atomic-force-microscope-Raman technique with nanometer-level space resolution, the high compressive stress about 700 MPa on the Si critical dimension (CD) is observed in the current complementary metal-oxide-semiconductor (CMOS) transistor. The difference of thermal expansion between Si and Shallow trench isolation (STI) oxide during the total thermal budget for the standard CMOS transistor manufacture process results in this high compressive stress in Si CD and will further degrade the electron carrier mobility about 25% seriously. In order to relax this intrinsic-processed compressive stress in Si CD and recover this device performance loss, the novel process is proposed in this paper in addition to the usage of one-side pad-SiN layer demonstrated in our previous work. With this novel process of additional nitrogen-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress in the Si CD can be achieved by the smaller difference of thermal expansion coefficients between Si and highly n-doped SiO 2 STI oxide. The formation of Si-N bonding in the STI-oxide region can be monitored by Fourier-transform infrared spectroscopy spectra, and the thermal expansion coefficients for Si, SiO 2 , and SiN are 2.6, 0.4, and 2.87 ppm/K, respectively. The relaxation of intrinsic-processed compressive stress in the Si CD of about 400 MPa by this proposed additional nitrogen IMP treatment contributes 14 % electron-carrier-mobility enhancement/recovery. The experimental electrical data agree well with the theoretical k.p calculation for the strained-Si theory. |
doi_str_mv | 10.1109/TED.2012.2198824 |
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The difference of thermal expansion between Si and Shallow trench isolation (STI) oxide during the total thermal budget for the standard CMOS transistor manufacture process results in this high compressive stress in Si CD and will further degrade the electron carrier mobility about 25% seriously. In order to relax this intrinsic-processed compressive stress in Si CD and recover this device performance loss, the novel process is proposed in this paper in addition to the usage of one-side pad-SiN layer demonstrated in our previous work. With this novel process of additional nitrogen-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress in the Si CD can be achieved by the smaller difference of thermal expansion coefficients between Si and highly n-doped SiO 2 STI oxide. The formation of Si-N bonding in the STI-oxide region can be monitored by Fourier-transform infrared spectroscopy spectra, and the thermal expansion coefficients for Si, SiO 2 , and SiN are 2.6, 0.4, and 2.87 ppm/K, respectively. The relaxation of intrinsic-processed compressive stress in the Si CD of about 400 MPa by this proposed additional nitrogen IMP treatment contributes 14 % electron-carrier-mobility enhancement/recovery. The experimental electrical data agree well with the theoretical k.p calculation for the strained-Si theory.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2012.2198824</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; CMOS ; Compressive properties ; Compressive stress ; Design. Technologies. Operation analysis. Testing ; Devices ; Electron carrier mobility ; Electronics ; Exact sciences and technology ; Integrated circuits ; Microelectronic fabrication (materials and surfaces technology) ; nitrogen ; Oxides ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Semiconductors ; Silicon ; Spectrum analysis ; stress ; Stresses ; Studies ; Thermal expansion ; Thermal stresses ; Transistors</subject><ispartof>IEEE transactions on electron devices, 2012-08, Vol.59 (8), p.2033-2036</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Aug 2012</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c396t-56114a6ce0b795fa43149cc96b1f678e05080d396e636d2170ba47993bf8fdb53</citedby><cites>FETCH-LOGICAL-c396t-56114a6ce0b795fa43149cc96b1f678e05080d396e636d2170ba47993bf8fdb53</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6236122$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6236122$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=26186121$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Liao, M.</creatorcontrib><creatorcontrib>Chih Hua Chen</creatorcontrib><creatorcontrib>Li Cheng Chang</creatorcontrib><creatorcontrib>Chen Yang</creatorcontrib><creatorcontrib>Ssu Chieh Kao</creatorcontrib><title>Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>Based on the stress extraction and measurement by the atomic-force-microscope-Raman technique with nanometer-level space resolution, the high compressive stress about 700 MPa on the Si critical dimension (CD) is observed in the current complementary metal-oxide-semiconductor (CMOS) transistor. The difference of thermal expansion between Si and Shallow trench isolation (STI) oxide during the total thermal budget for the standard CMOS transistor manufacture process results in this high compressive stress in Si CD and will further degrade the electron carrier mobility about 25% seriously. In order to relax this intrinsic-processed compressive stress in Si CD and recover this device performance loss, the novel process is proposed in this paper in addition to the usage of one-side pad-SiN layer demonstrated in our previous work. With this novel process of additional nitrogen-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress in the Si CD can be achieved by the smaller difference of thermal expansion coefficients between Si and highly n-doped SiO 2 STI oxide. The formation of Si-N bonding in the STI-oxide region can be monitored by Fourier-transform infrared spectroscopy spectra, and the thermal expansion coefficients for Si, SiO 2 , and SiN are 2.6, 0.4, and 2.87 ppm/K, respectively. The relaxation of intrinsic-processed compressive stress in the Si CD of about 400 MPa by this proposed additional nitrogen IMP treatment contributes 14 % electron-carrier-mobility enhancement/recovery. The experimental electrical data agree well with the theoretical k.p calculation for the strained-Si theory.</description><subject>Applied sciences</subject><subject>CMOS</subject><subject>Compressive properties</subject><subject>Compressive stress</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Electron carrier mobility</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Microelectronic fabrication (materials and surfaces technology)</subject><subject>nitrogen</subject><subject>Oxides</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Semiconductors</subject><subject>Silicon</subject><subject>Spectrum analysis</subject><subject>stress</subject><subject>Stresses</subject><subject>Studies</subject><subject>Thermal expansion</subject><subject>Thermal stresses</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkNGL1DAQh4MouJ6-C74ERPClayZp0-Tx2Du1cHrgrs8lTaeao03WJCv635uyyz34lMn8vhmYj5DXwLYATH843N5sOQO-5aCV4vUTsoGmaSsta_mUbBgDVWmhxHPyIqWH8pV1zTdkuR5Hl13wZqZfXY7hB3raBV91y3E2Pps1o4eIJi_oM3We7g8dzYF-w9n8ofkn0s7n6Hxylu7CcoyYkvuNdJ_Xik4hUl99ud9_vD2kl-TZZOaEry7vFfle2rvP1d39p253fVdZoWWuGglQG2mRDa1uJlMLqLW1Wg4wyVYha5hiY0FRCjlyaNlg6lZrMUxqGodGXJH3573HGH6dMOV-ccniXC7CcEo9CGikVK0SBX37H_oQTrHoKBTjijEu2UqxM2VjSCni1B-jW0z8W6B-9d8X__3qv7_4LyPvLotNsmaeovHWpcc5LkFJ4FC4N2fOIeJjLLkoKRf_ANqnjI4</recordid><startdate>20120801</startdate><enddate>20120801</enddate><creator>Liao, M.</creator><creator>Chih Hua Chen</creator><creator>Li Cheng Chang</creator><creator>Chen Yang</creator><creator>Ssu Chieh Kao</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20120801</creationdate><title>Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs</title><author>Liao, M. ; Chih Hua Chen ; Li Cheng Chang ; Chen Yang ; Ssu Chieh Kao</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c396t-56114a6ce0b795fa43149cc96b1f678e05080d396e636d2170ba47993bf8fdb53</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Applied sciences</topic><topic>CMOS</topic><topic>Compressive properties</topic><topic>Compressive stress</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Electron carrier mobility</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Microelectronic fabrication (materials and surfaces technology)</topic><topic>nitrogen</topic><topic>Oxides</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Semiconductors</topic><topic>Silicon</topic><topic>Spectrum analysis</topic><topic>stress</topic><topic>Stresses</topic><topic>Studies</topic><topic>Thermal expansion</topic><topic>Thermal stresses</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Liao, M.</creatorcontrib><creatorcontrib>Chih Hua Chen</creatorcontrib><creatorcontrib>Li Cheng Chang</creatorcontrib><creatorcontrib>Chen Yang</creatorcontrib><creatorcontrib>Ssu Chieh Kao</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Liao, M.</au><au>Chih Hua Chen</au><au>Li Cheng Chang</au><au>Chen Yang</au><au>Ssu Chieh Kao</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2012-08-01</date><risdate>2012</risdate><volume>59</volume><issue>8</issue><spage>2033</spage><epage>2036</epage><pages>2033-2036</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>Based on the stress extraction and measurement by the atomic-force-microscope-Raman technique with nanometer-level space resolution, the high compressive stress about 700 MPa on the Si critical dimension (CD) is observed in the current complementary metal-oxide-semiconductor (CMOS) transistor. The difference of thermal expansion between Si and Shallow trench isolation (STI) oxide during the total thermal budget for the standard CMOS transistor manufacture process results in this high compressive stress in Si CD and will further degrade the electron carrier mobility about 25% seriously. In order to relax this intrinsic-processed compressive stress in Si CD and recover this device performance loss, the novel process is proposed in this paper in addition to the usage of one-side pad-SiN layer demonstrated in our previous work. With this novel process of additional nitrogen-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress in the Si CD can be achieved by the smaller difference of thermal expansion coefficients between Si and highly n-doped SiO 2 STI oxide. The formation of Si-N bonding in the STI-oxide region can be monitored by Fourier-transform infrared spectroscopy spectra, and the thermal expansion coefficients for Si, SiO 2 , and SiN are 2.6, 0.4, and 2.87 ppm/K, respectively. The relaxation of intrinsic-processed compressive stress in the Si CD of about 400 MPa by this proposed additional nitrogen IMP treatment contributes 14 % electron-carrier-mobility enhancement/recovery. The experimental electrical data agree well with the theoretical k.p calculation for the strained-Si theory.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2012.2198824</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Applied sciences CMOS Compressive properties Compressive stress Design. Technologies. Operation analysis. Testing Devices Electron carrier mobility Electronics Exact sciences and technology Integrated circuits Microelectronic fabrication (materials and surfaces technology) nitrogen Oxides Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductors Silicon Spectrum analysis stress Stresses Studies Thermal expansion Thermal stresses Transistors |
title | Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs |
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