Energy-Efficient Design Methodologies: High-Performance VLSI Adders
Energy-efficient design requires exploration of available algorithms, recurrence structures, energy and wire tradeoffs, circuit design techniques, circuit sizing and system constraints. In this paper, methodology for energy-efficient design applied to 64-bit adders implemented with static CMOS, dyna...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 2010-06, Vol.45 (6), p.1220-1233 |
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| container_title | IEEE journal of solid-state circuits |
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| creator | Zeydel, Bart R Baran, Dursun Oklobdzija, Vojin G |
| description | Energy-efficient design requires exploration of available algorithms, recurrence structures, energy and wire tradeoffs, circuit design techniques, circuit sizing and system constraints. In this paper, methodology for energy-efficient design applied to 64-bit adders implemented with static CMOS, dynamic CMOS and CMOS compound domino logic families, is presented. We also examined 65 nm, 45 nm, 32 nm, and 22 nm technology nodes to explore the applicability of the results in deep submicron technologies. By applying energy-delay tradeoffs on various levels, we developed adder topology yielding up to 20% performance improvement and 4.5× energy reduction over existing designs. |
| doi_str_mv | 10.1109/JSSC.2010.2048730 |
| format | Article |
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In this paper, methodology for energy-efficient design applied to 64-bit adders implemented with static CMOS, dynamic CMOS and CMOS compound domino logic families, is presented. We also examined 65 nm, 45 nm, 32 nm, and 22 nm technology nodes to explore the applicability of the results in deep submicron technologies. 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In this paper, methodology for energy-efficient design applied to 64-bit adders implemented with static CMOS, dynamic CMOS and CMOS compound domino logic families, is presented. We also examined 65 nm, 45 nm, 32 nm, and 22 nm technology nodes to explore the applicability of the results in deep submicron technologies. By applying energy-delay tradeoffs on various levels, we developed adder topology yielding up to 20% performance improvement and 4.5× energy reduction over existing designs.</description><subject>Adders</subject><subject>Algorithm design and analysis</subject><subject>Applied sciences</subject><subject>Arithmetic and logic structures</subject><subject>Circuit design</subject><subject>Circuit properties</subject><subject>Circuit synthesis</subject><subject>Circuits</subject><subject>CMOS</subject><subject>CMOS logic circuits</subject><subject>CMOS technology</subject><subject>computer arithmetic</subject><subject>Design engineering</subject><subject>Design methodology</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Digital circuits</subject><subject>Dynamical systems</subject><subject>Dynamics</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Energy efficiency</subject><subject>energy-efficient design</subject><subject>Exact sciences and technology</subject><subject>Exploration</subject><subject>high-speed arithmetic</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Logic design</subject><subject>low-power design</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 2010-06, Vol.45 (6), p.1220-1233 |
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| language | eng |
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| source | IEEE/IET Electronic Library |
| subjects | Adders Algorithm design and analysis Applied sciences Arithmetic and logic structures Circuit design Circuit properties Circuit synthesis Circuits CMOS CMOS logic circuits CMOS technology computer arithmetic Design engineering Design methodology Design. Technologies. Operation analysis. Testing Digital circuits Dynamical systems Dynamics Electric, optical and optoelectronic circuits Electronic circuits Electronics Energy efficiency energy-efficient design Exact sciences and technology Exploration high-speed arithmetic Integrated circuits Integrated circuits by function (including memories and processors) Logic design low-power design Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Very large scale integration VLSI Wire |
| title | Energy-Efficient Design Methodologies: High-Performance VLSI Adders |
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