$Operational Voltage Reduction of Flash Memory Using High- \kappa Composite Tunnel Barriers$

Operational Voltage Reduction of Flash Memory Using High- \kappa Composite Tunnel Barriers

We explore the performance of symmetric (low-k/high-k/low-k) and asymmetric (low-k/high-k) composite tunnel barriers with conventional Flash constraints of retention, erase, read and program disturbs. Simulations, including five different high-k materials, were performed under these criteria to mini...

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Veröffentlicht in:	IEEE electron device letters 2008-03, Vol.29 (3), p.252-254
Hauptverfasser:	Verma, S., Pop, E., Kapur, P., Parat, K., Saraswat, K.C.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Composite materials Design optimization Design. Technologies. Operation analysis. Testing Dielectric materials Electronics Electrons Exact sciences and technology Flash memory Flash operating constraints high- kappa dielectrics Integrated circuits Integrated circuits by function (including memories and processors) Materials science and technology Memory management Nonvolatile memory program disturb read disturb retention Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices tunnel barrier engineering Voltage
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