CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation
We present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching proba...
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creator | Bountas, Dimitrios Stamoulis, Georgios I. |
description | We present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for both the effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. This approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter. |
doi_str_mv | 10.1007/11796435_34 |
format | Conference Proceeding |
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Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for both the effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. This approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter.</description><identifier>ISSN: 0302-9743</identifier><identifier>ISBN: 3540364102</identifier><identifier>ISBN: 9783540364108</identifier><identifier>EISSN: 1611-3349</identifier><identifier>EISBN: 3540364110</identifier><identifier>EISBN: 9783540364115</identifier><identifier>DOI: 10.1007/11796435_34</identifier><language>eng</language><publisher>Berlin, Heidelberg: Springer Berlin Heidelberg</publisher><subject>Applied sciences ; combinational circuits ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Semiconductor electronics. Microelectronics. Optoelectronics. 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Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for both the effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. This approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter.</description><subject>Applied sciences</subject><subject>combinational circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>SER</subject><subject>simulation</subject><issn>0302-9743</issn><issn>1611-3349</issn><isbn>3540364102</isbn><isbn>9783540364108</isbn><isbn>3540364110</isbn><isbn>9783540364115</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><recordid>eNpNkM1OwzAQhM2fRCk98QK-cOAQ2PU6jn0MVQtIlSqVcrbsNEGFEld2OHDjHXhDnoRURYK5rEbfaDUaxi4QrhGguEEsjJKUW5IH7IxyCaQkIhyyASrEjEiaoz8A4pgNgEBkppB0ykYpvUAvwoKMGrDbcblYzJf8-_OLl3wZwoY3IfKpSx137YqXVfUeXVfzx9B0fBJjDxc7P0nd-s1169Ces5PGbVI9-r1D9jSdLMf32Wx-9zAuZ9lWoOmyxmid-8KslBQgBXrnsPLe6MKTR9UYApeLSmhEEpWudQEGJIpceb-CvKEhu9z_3bpUuU0TXVutk93Gvkf8sGiU3qnPXe1zqUftcx2tD-E1WQS7W9D-W5B-APEMWz0</recordid><startdate>2006</startdate><enddate>2006</enddate><creator>Bountas, Dimitrios</creator><creator>Stamoulis, Georgios I.</creator><general>Springer Berlin Heidelberg</general><general>Springer</general><scope>IQODW</scope></search><sort><creationdate>2006</creationdate><title>CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation</title><author>Bountas, Dimitrios ; Stamoulis, Georgios I.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-p219t-f9885b79d6420421baa1cbb987b3b16f930a52c281132c8e8709041256bbd05f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Applied sciences</topic><topic>combinational circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>SER</topic><topic>simulation</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Bountas, Dimitrios</creatorcontrib><creatorcontrib>Stamoulis, Georgios I.</creatorcontrib><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Bountas, Dimitrios</au><au>Stamoulis, Georgios I.</au><au>Hämäläinen, Timo D.</au><au>Vassiliadis, Stamatis</au><au>Wong, Stephan</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation</atitle><btitle>Embedded Computer Systems: Architectures, Modeling, and Simulation</btitle><date>2006</date><risdate>2006</risdate><spage>331</spage><epage>338</epage><pages>331-338</pages><issn>0302-9743</issn><eissn>1611-3349</eissn><isbn>3540364102</isbn><isbn>9783540364108</isbn><eisbn>3540364110</eisbn><eisbn>9783540364115</eisbn><abstract>We present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for both the effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. This approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter.</abstract><cop>Berlin, Heidelberg</cop><pub>Springer Berlin Heidelberg</pub><doi>10.1007/11796435_34</doi><tpages>8</tpages></addata></record> |
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ispartof | Embedded Computer Systems: Architectures, Modeling, and Simulation, 2006, p.331-338 |
issn | 0302-9743 1611-3349 |
language | eng |
recordid | cdi_pascalfrancis_primary_19688888 |
source | Springer Books |
subjects | Applied sciences combinational circuits Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices SER simulation |
title | CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation |
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