Systolic Architecture for Adaptive Censoring CFAR PI Detector

A new parallel algorithm for signal processing and a parallel systolic architecture of a robust Constant False Alarm Rate (CFAR) processor with post-detection integration and adaptive censoring (RACPI) is presented in the paper. This detector is effective in conditions of flow from strong impulse in...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Garvanov, Ivan, Kabakchiev, Christo, Daskalov, Plamen
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Applied sciences Computer science control theory systems Computer systems and distributed systems. User interface Constant False Alarm Rate Exact sciences and technology False Alarm Probability Linear Frequency Modulate Parallel Algorithm Software Sorting Algorithm
Online-Zugang:	Volltext
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