Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays
This paper discusses two implementations of a dual-microphone phase-based speech enhancement technique. The implementations compared are based on a field-programmable gate array (FPGA) and a digital signal processor (DSP). The time-varying, frequency-dependent, phase-difference between each incoming...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on signal processing 2007-07, Vol.55 (7), p.3526-3535 |
|---|---|
| Hauptverfasser: | , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 3535 |
|---|---|
| container_issue | 7 |
| container_start_page | 3526 |
| container_title | IEEE transactions on signal processing |
| container_volume | 55 |
| creator | Halupka, D. Rabi, A.S. Aarabi, P. Sheikholeslami, A. |
| description | This paper discusses two implementations of a dual-microphone phase-based speech enhancement technique. The implementations compared are based on a field-programmable gate array (FPGA) and a digital signal processor (DSP). The time-varying, frequency-dependent, phase-difference between each incoming sound signal is used to mask each respective frequency, thereby reducing noise by minimizing the contributions of signal frequency components that have a low signal-to-noise ratio (SNR). Phase-based filtering can achieve high SNR gains with just two microphones, making it ideal for small devices that lack the room for a multimicrophone array. Moreover, these devices often have a limited battery life and lack the processing power needed for software-based speech enhancement. This paper presents an FPGA-based dual-microphone speech enhancement implementation, which was designed specifically for low-power operation. This implementation is compared with an off-the-shelf DSP implementation, with respect to processing capabilities and power utilization. |
| doi_str_mv | 10.1109/TSP.2007.893918 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_pascalfrancis_primary_18877815</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4244679</ieee_id><sourcerecordid>34877935</sourcerecordid><originalsourceid>FETCH-LOGICAL-c382t-4a8edff98ccc76abc8b786dcbd75bcd18ffa1c2c9bf4be24cd1991da2b3f91bb3</originalsourceid><addsrcrecordid>eNp9kU1LAzEQhhdRsH6cPXhZBMXL1mST3SRHUVuFihVb8BaS7KRd2S-TLdJ_b0qLggdPM8w8M7wzbxSdYTTEGImb2dt0mCLEhlwQgfleNMCC4gRRlu-HHGUkyTh7P4yOvP9ACFMq8kH0Omm_kmn7BS6-X6kqeS6Na7tl20D81gGYZfzQLFVjoIamj-e-bBbxqISqiKeuXThV10pXEI9VD_Gtc2rtT6IDqyoPp7t4HM1HD7O7x2TyMn66u50khvC0T6jiUFgruDGG5UobrhnPC6MLlmlTYG6twiY1QluqIaWhJAQuVKqJFVhrchxdbfd2rv1cge9lXXoDVaUaaFdeEsoZEyQL4PW_ICZUUEJEjgJ68Qf9aFeuCWdIntOMklywAN1sofAp7x1Y2bmyVm4tMZIbK2SwQm6skFsrwsTlbq3yRlXWhYeW_neMB6Ucb5Seb7kSAH7aNKU0D5d8A1xekp0</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>864543697</pqid></control><display><type>article</type><title>Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays</title><source>IEEE Electronic Library (IEL)</source><creator>Halupka, D. ; Rabi, A.S. ; Aarabi, P. ; Sheikholeslami, A.</creator><creatorcontrib>Halupka, D. ; Rabi, A.S. ; Aarabi, P. ; Sheikholeslami, A.</creatorcontrib><description>This paper discusses two implementations of a dual-microphone phase-based speech enhancement technique. The implementations compared are based on a field-programmable gate array (FPGA) and a digital signal processor (DSP). The time-varying, frequency-dependent, phase-difference between each incoming sound signal is used to mask each respective frequency, thereby reducing noise by minimizing the contributions of signal frequency components that have a low signal-to-noise ratio (SNR). Phase-based filtering can achieve high SNR gains with just two microphones, making it ideal for small devices that lack the room for a multimicrophone array. Moreover, these devices often have a limited battery life and lack the processing power needed for software-based speech enhancement. This paper presents an FPGA-based dual-microphone speech enhancement implementation, which was designed specifically for low-power operation. This implementation is compared with an off-the-shelf DSP implementation, with respect to processing capabilities and power utilization.</description><identifier>ISSN: 1053-587X</identifier><identifier>EISSN: 1941-0476</identifier><identifier>DOI: 10.1109/TSP.2007.893918</identifier><identifier>CODEN: ITPRED</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Acoustic noise ; Applied sciences ; Arrays ; Detection, estimation, filtering, equalization, prediction ; Devices ; Digital signal processing ; Digital signal processors ; Exact sciences and technology ; Field programmable gate arrays ; field-programmable gate arrays (FPGAs) ; Filtering ; Frequency ; Information, signal and communications theory ; low-power systems ; Microphone arrays ; Microphones ; Miscellaneous ; Noise reduction ; Phased arrays ; Signal and communications theory ; Signal processing ; Signal to noise ratio ; Signal, noise ; sound localization ; Speech ; Speech enhancement ; Speech processing ; Telecommunications and information theory</subject><ispartof>IEEE transactions on signal processing, 2007-07, Vol.55 (7), p.3526-3535</ispartof><rights>2007 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2007</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c382t-4a8edff98ccc76abc8b786dcbd75bcd18ffa1c2c9bf4be24cd1991da2b3f91bb3</citedby><cites>FETCH-LOGICAL-c382t-4a8edff98ccc76abc8b786dcbd75bcd18ffa1c2c9bf4be24cd1991da2b3f91bb3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4244679$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4244679$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=18877815$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Halupka, D.</creatorcontrib><creatorcontrib>Rabi, A.S.</creatorcontrib><creatorcontrib>Aarabi, P.</creatorcontrib><creatorcontrib>Sheikholeslami, A.</creatorcontrib><title>Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays</title><title>IEEE transactions on signal processing</title><addtitle>TSP</addtitle><description>This paper discusses two implementations of a dual-microphone phase-based speech enhancement technique. The implementations compared are based on a field-programmable gate array (FPGA) and a digital signal processor (DSP). The time-varying, frequency-dependent, phase-difference between each incoming sound signal is used to mask each respective frequency, thereby reducing noise by minimizing the contributions of signal frequency components that have a low signal-to-noise ratio (SNR). Phase-based filtering can achieve high SNR gains with just two microphones, making it ideal for small devices that lack the room for a multimicrophone array. Moreover, these devices often have a limited battery life and lack the processing power needed for software-based speech enhancement. This paper presents an FPGA-based dual-microphone speech enhancement implementation, which was designed specifically for low-power operation. This implementation is compared with an off-the-shelf DSP implementation, with respect to processing capabilities and power utilization.</description><subject>Acoustic noise</subject><subject>Applied sciences</subject><subject>Arrays</subject><subject>Detection, estimation, filtering, equalization, prediction</subject><subject>Devices</subject><subject>Digital signal processing</subject><subject>Digital signal processors</subject><subject>Exact sciences and technology</subject><subject>Field programmable gate arrays</subject><subject>field-programmable gate arrays (FPGAs)</subject><subject>Filtering</subject><subject>Frequency</subject><subject>Information, signal and communications theory</subject><subject>low-power systems</subject><subject>Microphone arrays</subject><subject>Microphones</subject><subject>Miscellaneous</subject><subject>Noise reduction</subject><subject>Phased arrays</subject><subject>Signal and communications theory</subject><subject>Signal processing</subject><subject>Signal to noise ratio</subject><subject>Signal, noise</subject><subject>sound localization</subject><subject>Speech</subject><subject>Speech enhancement</subject><subject>Speech processing</subject><subject>Telecommunications and information theory</subject><issn>1053-587X</issn><issn>1941-0476</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2007</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9kU1LAzEQhhdRsH6cPXhZBMXL1mST3SRHUVuFihVb8BaS7KRd2S-TLdJ_b0qLggdPM8w8M7wzbxSdYTTEGImb2dt0mCLEhlwQgfleNMCC4gRRlu-HHGUkyTh7P4yOvP9ACFMq8kH0Omm_kmn7BS6-X6kqeS6Na7tl20D81gGYZfzQLFVjoIamj-e-bBbxqISqiKeuXThV10pXEI9VD_Gtc2rtT6IDqyoPp7t4HM1HD7O7x2TyMn66u50khvC0T6jiUFgruDGG5UobrhnPC6MLlmlTYG6twiY1QluqIaWhJAQuVKqJFVhrchxdbfd2rv1cge9lXXoDVaUaaFdeEsoZEyQL4PW_ICZUUEJEjgJ68Qf9aFeuCWdIntOMklywAN1sofAp7x1Y2bmyVm4tMZIbK2SwQm6skFsrwsTlbq3yRlXWhYeW_neMB6Ucb5Seb7kSAH7aNKU0D5d8A1xekp0</recordid><startdate>20070701</startdate><enddate>20070701</enddate><creator>Halupka, D.</creator><creator>Rabi, A.S.</creator><creator>Aarabi, P.</creator><creator>Sheikholeslami, A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20070701</creationdate><title>Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays</title><author>Halupka, D. ; Rabi, A.S. ; Aarabi, P. ; Sheikholeslami, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c382t-4a8edff98ccc76abc8b786dcbd75bcd18ffa1c2c9bf4be24cd1991da2b3f91bb3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Acoustic noise</topic><topic>Applied sciences</topic><topic>Arrays</topic><topic>Detection, estimation, filtering, equalization, prediction</topic><topic>Devices</topic><topic>Digital signal processing</topic><topic>Digital signal processors</topic><topic>Exact sciences and technology</topic><topic>Field programmable gate arrays</topic><topic>field-programmable gate arrays (FPGAs)</topic><topic>Filtering</topic><topic>Frequency</topic><topic>Information, signal and communications theory</topic><topic>low-power systems</topic><topic>Microphone arrays</topic><topic>Microphones</topic><topic>Miscellaneous</topic><topic>Noise reduction</topic><topic>Phased arrays</topic><topic>Signal and communications theory</topic><topic>Signal processing</topic><topic>Signal to noise ratio</topic><topic>Signal, noise</topic><topic>sound localization</topic><topic>Speech</topic><topic>Speech enhancement</topic><topic>Speech processing</topic><topic>Telecommunications and information theory</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Halupka, D.</creatorcontrib><creatorcontrib>Rabi, A.S.</creatorcontrib><creatorcontrib>Aarabi, P.</creatorcontrib><creatorcontrib>Sheikholeslami, A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on signal processing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Halupka, D.</au><au>Rabi, A.S.</au><au>Aarabi, P.</au><au>Sheikholeslami, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays</atitle><jtitle>IEEE transactions on signal processing</jtitle><stitle>TSP</stitle><date>2007-07-01</date><risdate>2007</risdate><volume>55</volume><issue>7</issue><spage>3526</spage><epage>3535</epage><pages>3526-3535</pages><issn>1053-587X</issn><eissn>1941-0476</eissn><coden>ITPRED</coden><abstract>This paper discusses two implementations of a dual-microphone phase-based speech enhancement technique. The implementations compared are based on a field-programmable gate array (FPGA) and a digital signal processor (DSP). The time-varying, frequency-dependent, phase-difference between each incoming sound signal is used to mask each respective frequency, thereby reducing noise by minimizing the contributions of signal frequency components that have a low signal-to-noise ratio (SNR). Phase-based filtering can achieve high SNR gains with just two microphones, making it ideal for small devices that lack the room for a multimicrophone array. Moreover, these devices often have a limited battery life and lack the processing power needed for software-based speech enhancement. This paper presents an FPGA-based dual-microphone speech enhancement implementation, which was designed specifically for low-power operation. This implementation is compared with an off-the-shelf DSP implementation, with respect to processing capabilities and power utilization.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TSP.2007.893918</doi><tpages>10</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1053-587X |
| ispartof | IEEE transactions on signal processing, 2007-07, Vol.55 (7), p.3526-3535 |
| issn | 1053-587X 1941-0476 |
| language | eng |
| recordid | cdi_pascalfrancis_primary_18877815 |
| source | IEEE Electronic Library (IEL) |
| subjects | Acoustic noise Applied sciences Arrays Detection, estimation, filtering, equalization, prediction Devices Digital signal processing Digital signal processors Exact sciences and technology Field programmable gate arrays field-programmable gate arrays (FPGAs) Filtering Frequency Information, signal and communications theory low-power systems Microphone arrays Microphones Miscellaneous Noise reduction Phased arrays Signal and communications theory Signal processing Signal to noise ratio Signal, noise sound localization Speech Speech enhancement Speech processing Telecommunications and information theory |
| title | Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T23%3A45%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Low-Power%20Dual-Microphone%20Speech%20Enhancement%20Using%20Field%20Programmable%20Gate%20Arrays&rft.jtitle=IEEE%20transactions%20on%20signal%20processing&rft.au=Halupka,%20D.&rft.date=2007-07-01&rft.volume=55&rft.issue=7&rft.spage=3526&rft.epage=3535&rft.pages=3526-3535&rft.issn=1053-587X&rft.eissn=1941-0476&rft.coden=ITPRED&rft_id=info:doi/10.1109/TSP.2007.893918&rft_dat=%3Cproquest_RIE%3E34877935%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=864543697&rft_id=info:pmid/&rft_ieee_id=4244679&rfr_iscdi=true |