Constrained algorithmic IP design for system-on-chip: Systems-on-chip: Design and test
Gespeichert in:
| Veröffentlicht in: | Integration (Amsterdam) 2007, Vol.40 (2), p.94-105 |
|---|---|
| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 105 |
|---|---|
| container_issue | 2 |
| container_start_page | 94 |
| container_title | Integration (Amsterdam) |
| container_volume | 40 |
| creator | COUSSY, P CASSEAU, E BOMEL, P BAGANNE, A MARTIN, E |
| description | |
| format | Article |
| fullrecord | <record><control><sourceid>pascalfrancis</sourceid><recordid>TN_cdi_pascalfrancis_primary_18450355</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>18450355</sourcerecordid><originalsourceid>FETCH-pascalfrancis_primary_184503553</originalsourceid><addsrcrecordid>eNqNyrsOgjAUANDGaCI-_qGLY5O2UIoz0ejm4E5uSoFroCW9LPy9ix_gdJazYZmqrBbWaL1lmVSlFVddyj07EH2klKqwJmNFHQMtCTD4lsPYx4TLMKHjzxdvPWEfeBcTp5UWP4kYhBtwPrFdByP5888ju9xv7_ohZiAHY5cgOKRmTjhBWhtVFUbmxuT_vi8tCjfe</addsrcrecordid><sourcetype>Index Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Constrained algorithmic IP design for system-on-chip: Systems-on-chip: Design and test</title><source>Elsevier ScienceDirect Journals Complete</source><creator>COUSSY, P ; CASSEAU, E ; BOMEL, P ; BAGANNE, A ; MARTIN, E</creator><creatorcontrib>COUSSY, P ; CASSEAU, E ; BOMEL, P ; BAGANNE, A ; MARTIN, E</creatorcontrib><identifier>ISSN: 0167-9260</identifier><identifier>EISSN: 1872-7522</identifier><identifier>CODEN: IVJODL</identifier><language>eng</language><publisher>Amsterdam: Elsevier Science</publisher><subject>Applied sciences ; Design. Technologies. Operation analysis. Testing ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><ispartof>Integration (Amsterdam), 2007, Vol.40 (2), p.94-105</ispartof><rights>2007 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,4009</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=18450355$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>COUSSY, P</creatorcontrib><creatorcontrib>CASSEAU, E</creatorcontrib><creatorcontrib>BOMEL, P</creatorcontrib><creatorcontrib>BAGANNE, A</creatorcontrib><creatorcontrib>MARTIN, E</creatorcontrib><title>Constrained algorithmic IP design for system-on-chip: Systems-on-chip: Design and test</title><title>Integration (Amsterdam)</title><subject>Applied sciences</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><issn>0167-9260</issn><issn>1872-7522</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2007</creationdate><recordtype>article</recordtype><recordid>eNqNyrsOgjAUANDGaCI-_qGLY5O2UIoz0ejm4E5uSoFroCW9LPy9ix_gdJazYZmqrBbWaL1lmVSlFVddyj07EH2klKqwJmNFHQMtCTD4lsPYx4TLMKHjzxdvPWEfeBcTp5UWP4kYhBtwPrFdByP5888ju9xv7_ohZiAHY5cgOKRmTjhBWhtVFUbmxuT_vi8tCjfe</recordid><startdate>2007</startdate><enddate>2007</enddate><creator>COUSSY, P</creator><creator>CASSEAU, E</creator><creator>BOMEL, P</creator><creator>BAGANNE, A</creator><creator>MARTIN, E</creator><general>Elsevier Science</general><scope>IQODW</scope></search><sort><creationdate>2007</creationdate><title>Constrained algorithmic IP design for system-on-chip</title><author>COUSSY, P ; CASSEAU, E ; BOMEL, P ; BAGANNE, A ; MARTIN, E</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-pascalfrancis_primary_184503553</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Applied sciences</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>COUSSY, P</creatorcontrib><creatorcontrib>CASSEAU, E</creatorcontrib><creatorcontrib>BOMEL, P</creatorcontrib><creatorcontrib>BAGANNE, A</creatorcontrib><creatorcontrib>MARTIN, E</creatorcontrib><collection>Pascal-Francis</collection><jtitle>Integration (Amsterdam)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>COUSSY, P</au><au>CASSEAU, E</au><au>BOMEL, P</au><au>BAGANNE, A</au><au>MARTIN, E</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Constrained algorithmic IP design for system-on-chip: Systems-on-chip: Design and test</atitle><jtitle>Integration (Amsterdam)</jtitle><date>2007</date><risdate>2007</risdate><volume>40</volume><issue>2</issue><spage>94</spage><epage>105</epage><pages>94-105</pages><issn>0167-9260</issn><eissn>1872-7522</eissn><coden>IVJODL</coden><cop>Amsterdam</cop><pub>Elsevier Science</pub></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0167-9260 |
| ispartof | Integration (Amsterdam), 2007, Vol.40 (2), p.94-105 |
| issn | 0167-9260 1872-7522 |
| language | eng |
| recordid | cdi_pascalfrancis_primary_18450355 |
| source | Elsevier ScienceDirect Journals Complete |
| subjects | Applied sciences Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices |
| title | Constrained algorithmic IP design for system-on-chip: Systems-on-chip: Design and test |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T07%3A45%3A29IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Constrained%20algorithmic%20IP%20design%20for%20system-on-chip:%20Systems-on-chip:%20Design%20and%20test&rft.jtitle=Integration%20(Amsterdam)&rft.au=COUSSY,%20P&rft.date=2007&rft.volume=40&rft.issue=2&rft.spage=94&rft.epage=105&rft.pages=94-105&rft.issn=0167-9260&rft.eissn=1872-7522&rft.coden=IVJODL&rft_id=info:doi/&rft_dat=%3Cpascalfrancis%3E18450355%3C/pascalfrancis%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |