Package-level integrated antennas based on LTCC technology
We propose a novel package topology integrating multilayer miniaturized antennas. Such a functional package is suitable for the design of a system-on-chip device, or of system-on-package applications. A stacked patch antenna is designed and integrated in a package using a low temperature co-fired ce...
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Veröffentlicht in: | IEEE transactions on antennas and propagation 2006-08, Vol.54 (8), p.2190-2197 |
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container_title | IEEE transactions on antennas and propagation |
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creator | Sang-Hyuk Wi Yong-Bin Sun In-Sang Song Sung-Hoon Choa Koh, I.-S. Yong-Shik Lee Jong-Gwan Yook |
description | We propose a novel package topology integrating multilayer miniaturized antennas. Such a functional package is suitable for the design of a system-on-chip device, or of system-on-package applications. A stacked patch antenna is designed and integrated in a package using a low temperature co-fired ceramic process. The overall size of the package is 10.3times10.3times1.3 mm 3 , and this package contains an 8.3times8.3times0.7 mm 3 internal space for the integration of chip-scale packaged components. The package is mounted on a 20times20 mm 2 ground plane to miniaturize the volume of the system. The antenna is designed to have two neighboring resonant frequencies at 5.264 and 5.355 GHz, resulting in a 140 MHz impedance bandwidth. However, the measured resonant frequencies occur at slightly higher frequencies due to manufacturing tolerances. Radiation patterns are similar to a conventional patch antenna. In addition, various parasitic effects rooted in the package size, ground size, antenna height, SMA connector, via misalignment, and the number of via holes and their locations are fully investigated |
doi_str_mv | 10.1109/TAP.2006.879191 |
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Such a functional package is suitable for the design of a system-on-chip device, or of system-on-package applications. A stacked patch antenna is designed and integrated in a package using a low temperature co-fired ceramic process. The overall size of the package is 10.3times10.3times1.3 mm 3 , and this package contains an 8.3times8.3times0.7 mm 3 internal space for the integration of chip-scale packaged components. The package is mounted on a 20times20 mm 2 ground plane to miniaturize the volume of the system. The antenna is designed to have two neighboring resonant frequencies at 5.264 and 5.355 GHz, resulting in a 140 MHz impedance bandwidth. However, the measured resonant frequencies occur at slightly higher frequencies due to manufacturing tolerances. Radiation patterns are similar to a conventional patch antenna. In addition, various parasitic effects rooted in the package size, ground size, antenna height, SMA connector, via misalignment, and the number of via holes and their locations are fully investigated</description><identifier>ISSN: 0018-926X</identifier><identifier>EISSN: 1558-2221</identifier><identifier>DOI: 10.1109/TAP.2006.879191</identifier><identifier>CODEN: IETPAK</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Antennas ; Applied sciences ; Bandwidth ; Ceramics ; Chip scale packaging ; Connectors ; Devices ; Exact sciences and technology ; Functional package ; Ground plane ; Grounds ; Impedance ; Nonhomogeneous media ; package-level integrated antenna ; Packages ; Patch antennas ; Radiocommunications ; Resonant frequencies ; Resonant frequency ; Semiconductors ; System-on-a-chip ; system-on-chip ; system-on-package (SOP) ; Telecommunications ; Telecommunications and information theory ; Temperature ; Topology</subject><ispartof>IEEE transactions on antennas and propagation, 2006-08, Vol.54 (8), p.2190-2197</ispartof><rights>2006 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2006</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c350t-620c2d0103812bd20a714f6554d959b36bc806be5e118cc4e40cf1b6f6f08d393</citedby><cites>FETCH-LOGICAL-c350t-620c2d0103812bd20a714f6554d959b36bc806be5e118cc4e40cf1b6f6f08d393</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1668292$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1668292$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=18023017$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Sang-Hyuk Wi</creatorcontrib><creatorcontrib>Yong-Bin Sun</creatorcontrib><creatorcontrib>In-Sang Song</creatorcontrib><creatorcontrib>Sung-Hoon Choa</creatorcontrib><creatorcontrib>Koh, I.-S.</creatorcontrib><creatorcontrib>Yong-Shik Lee</creatorcontrib><creatorcontrib>Jong-Gwan Yook</creatorcontrib><title>Package-level integrated antennas based on LTCC technology</title><title>IEEE transactions on antennas and propagation</title><addtitle>TAP</addtitle><description>We propose a novel package topology integrating multilayer miniaturized antennas. Such a functional package is suitable for the design of a system-on-chip device, or of system-on-package applications. A stacked patch antenna is designed and integrated in a package using a low temperature co-fired ceramic process. The overall size of the package is 10.3times10.3times1.3 mm 3 , and this package contains an 8.3times8.3times0.7 mm 3 internal space for the integration of chip-scale packaged components. The package is mounted on a 20times20 mm 2 ground plane to miniaturize the volume of the system. The antenna is designed to have two neighboring resonant frequencies at 5.264 and 5.355 GHz, resulting in a 140 MHz impedance bandwidth. However, the measured resonant frequencies occur at slightly higher frequencies due to manufacturing tolerances. Radiation patterns are similar to a conventional patch antenna. In addition, various parasitic effects rooted in the package size, ground size, antenna height, SMA connector, via misalignment, and the number of via holes and their locations are fully investigated</description><subject>Antennas</subject><subject>Applied sciences</subject><subject>Bandwidth</subject><subject>Ceramics</subject><subject>Chip scale packaging</subject><subject>Connectors</subject><subject>Devices</subject><subject>Exact sciences and technology</subject><subject>Functional package</subject><subject>Ground plane</subject><subject>Grounds</subject><subject>Impedance</subject><subject>Nonhomogeneous media</subject><subject>package-level integrated antenna</subject><subject>Packages</subject><subject>Patch antennas</subject><subject>Radiocommunications</subject><subject>Resonant frequencies</subject><subject>Resonant frequency</subject><subject>Semiconductors</subject><subject>System-on-a-chip</subject><subject>system-on-chip</subject><subject>system-on-package (SOP)</subject><subject>Telecommunications</subject><subject>Telecommunications and information theory</subject><subject>Temperature</subject><subject>Topology</subject><issn>0018-926X</issn><issn>1558-2221</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkM1Lw0AQxRdRsFbPHrwEQTylndndbHe9SfALCvZQwVvYbCY1NU1qNhX637ulhYKnmWF-7zHzGLtGGCGCGc8fZyMOoEZ6YtDgCRtgkuiYc46nbACAOjZcfZ6zC--XYZRaygF7mFn3bRcU1_RLdVQ1PS0621MR2dA2jfVRbn0Y2yaaztM06sl9NW3dLraX7Ky0taerQx2yj-enefoaT99f3tLHaexEAn2sODheAILQyPOCg52gLFWSyMIkJhcqdxpUTgkhauckSXAl5qpUJehCGDFk93vfddf-bMj32aryjuraNtRufBa-NailkIG8_Ucu203XhOMCxFFIzXmAxnvIda33HZXZuqtWtttmCNkuySwkme2SzPZJBsXdwdZ6Z-uys42r_FGmgQvASeBu9lxFRMe1UpobLv4A05d5oA</recordid><startdate>20060801</startdate><enddate>20060801</enddate><creator>Sang-Hyuk Wi</creator><creator>Yong-Bin Sun</creator><creator>In-Sang Song</creator><creator>Sung-Hoon Choa</creator><creator>Koh, I.-S.</creator><creator>Yong-Shik Lee</creator><creator>Jong-Gwan Yook</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Such a functional package is suitable for the design of a system-on-chip device, or of system-on-package applications. A stacked patch antenna is designed and integrated in a package using a low temperature co-fired ceramic process. The overall size of the package is 10.3times10.3times1.3 mm 3 , and this package contains an 8.3times8.3times0.7 mm 3 internal space for the integration of chip-scale packaged components. The package is mounted on a 20times20 mm 2 ground plane to miniaturize the volume of the system. The antenna is designed to have two neighboring resonant frequencies at 5.264 and 5.355 GHz, resulting in a 140 MHz impedance bandwidth. However, the measured resonant frequencies occur at slightly higher frequencies due to manufacturing tolerances. Radiation patterns are similar to a conventional patch antenna. In addition, various parasitic effects rooted in the package size, ground size, antenna height, SMA connector, via misalignment, and the number of via holes and their locations are fully investigated</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TAP.2006.879191</doi><tpages>8</tpages></addata></record> |
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subjects | Antennas Applied sciences Bandwidth Ceramics Chip scale packaging Connectors Devices Exact sciences and technology Functional package Ground plane Grounds Impedance Nonhomogeneous media package-level integrated antenna Packages Patch antennas Radiocommunications Resonant frequencies Resonant frequency Semiconductors System-on-a-chip system-on-chip system-on-package (SOP) Telecommunications Telecommunications and information theory Temperature Topology |
title | Package-level integrated antennas based on LTCC technology |
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