Gate oxide integrity improvement by optimising poly deposition process
The gate oxide integrity of oxide thickness 13.5 nm has been studied for different amorphous poly deposition conditions. The poly grain was varied by the poly deposition conditions. The study, which was carried out on BiCMOS devices, showed substantial reliability degradation in the gate oxides when...
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| creator | Tze Kiong Ng Yap, A. Keng Foo Lo Poh Chuan Ang |
| description | The gate oxide integrity of oxide thickness 13.5 nm has been studied for different amorphous poly deposition conditions. The poly grain was varied by the poly deposition conditions. The study, which was carried out on BiCMOS devices, showed substantial reliability degradation in the gate oxides when using amorphous poly deposition at temperatures of 550 /spl deg/C versus 530 /spl deg/C and thickness of 60 nm versus 65 nm. A possible mechanism for the drastic reliability degradation is the protrusion of poly grains into the softening oxide at high temperature. |
| doi_str_mv | 10.1109/IRWS.2004.1422760 |
| format | Conference Proceeding |
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The poly grain was varied by the poly deposition conditions. The study, which was carried out on BiCMOS devices, showed substantial reliability degradation in the gate oxides when using amorphous poly deposition at temperatures of 550 /spl deg/C versus 530 /spl deg/C and thickness of 60 nm versus 65 nm. A possible mechanism for the drastic reliability degradation is the protrusion of poly grains into the softening oxide at high temperature.</description><identifier>ISBN: 0780385179</identifier><identifier>ISBN: 9780780385177</identifier><identifier>DOI: 10.1109/IRWS.2004.1422760</identifier><language>eng</language><publisher>Piscataway NJ: IEEE</publisher><subject>Amorphous materials ; Applied sciences ; Circuit testing ; Current measurement ; Design. Technologies. Operation analysis. Testing ; Dielectrics ; Electronic equipment testing ; Electronics ; Exact sciences and technology ; Gate leakage ; Integrated circuits ; Leakage current ; Manufacturing processes ; Semiconductor electronics. Microelectronics. Optoelectronics. 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The poly grain was varied by the poly deposition conditions. The study, which was carried out on BiCMOS devices, showed substantial reliability degradation in the gate oxides when using amorphous poly deposition at temperatures of 550 /spl deg/C versus 530 /spl deg/C and thickness of 60 nm versus 65 nm. A possible mechanism for the drastic reliability degradation is the protrusion of poly grains into the softening oxide at high temperature.</description><subject>Amorphous materials</subject><subject>Applied sciences</subject><subject>Circuit testing</subject><subject>Current measurement</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Dielectrics</subject><subject>Electronic equipment testing</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Gate leakage</subject><subject>Integrated circuits</subject><subject>Leakage current</subject><subject>Manufacturing processes</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Technologies. Operation analysis. Testing</topic><topic>Dielectrics</topic><topic>Electronic equipment testing</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Gate leakage</topic><topic>Integrated circuits</topic><topic>Leakage current</topic><topic>Manufacturing processes</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Substrates</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Tze Kiong Ng</creatorcontrib><creatorcontrib>Yap, A.</creatorcontrib><creatorcontrib>Keng Foo Lo</creatorcontrib><creatorcontrib>Poh Chuan Ang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tze Kiong Ng</au><au>Yap, A.</au><au>Keng Foo Lo</au><au>Poh Chuan Ang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Gate oxide integrity improvement by optimising poly deposition process</atitle><btitle>2004 IEEE International Integrated Reliability Workshop</btitle><stitle>IRWS</stitle><date>2004</date><risdate>2004</risdate><spage>148</spage><epage>150</epage><pages>148-150</pages><isbn>0780385179</isbn><isbn>9780780385177</isbn><abstract>The gate oxide integrity of oxide thickness 13.5 nm has been studied for different amorphous poly deposition conditions. The poly grain was varied by the poly deposition conditions. The study, which was carried out on BiCMOS devices, showed substantial reliability degradation in the gate oxides when using amorphous poly deposition at temperatures of 550 /spl deg/C versus 530 /spl deg/C and thickness of 60 nm versus 65 nm. A possible mechanism for the drastic reliability degradation is the protrusion of poly grains into the softening oxide at high temperature.</abstract><cop>Piscataway NJ</cop><pub>IEEE</pub><doi>10.1109/IRWS.2004.1422760</doi><tpages>3</tpages></addata></record> |
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| subjects | Amorphous materials Applied sciences Circuit testing Current measurement Design. Technologies. Operation analysis. Testing Dielectrics Electronic equipment testing Electronics Exact sciences and technology Gate leakage Integrated circuits Leakage current Manufacturing processes Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Substrates Voltage |
| title | Gate oxide integrity improvement by optimising poly deposition process |
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