SDODEL MOSFET for performance enhancement

A high-energy, low-dose implant of the source/drain (S/D) doping type is introduced after the gate definition step to form doped regions beneath and separated from the source and drain regions to fabricate source/drain on depletion layer (SDODEL) transistors. Under zero bias, these doped regions are...

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Veröffentlicht in:	IEEE electron device letters 2005-03, Vol.26 (3), p.205-207
Hauptverfasser:	King Jien Chui, Samudra, G.S., Yee-Chia Yeo, Kheng-Chok Tee, Leong, K.-W., Kian Meng Tee, Benistant, F., Lap Chan
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Capacitance Circuit properties CMOS process Depletion Design. Technologies. Operation analysis. Testing Dielectrics and electrical insulation Doping Drains Electric, optical and optoelectronic circuits Electrical junctions Electronic circuits Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Gates Implants Integrated circuits Junction capacitance MOSFET MOSFET circuits MOSFETs Oscillators, resonators, synthetizers Semiconductor devices Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductors Silicon on insulator technology Threshold voltage Transistors Velocity measurement Voltage control
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