Architecture and Early Performance of the New IBM HPS Fabric and Adapter
In this paper we describe the architecture, design, and performance of the new cluster switch fabric and adapter called HPS (High Performance Switch). HPS delivers very low latency and very high bandwidth. We demonstrate latency of less than 4.3us MPI library; 1.8GB/s of delivered unidirectional ban...
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creator | Govindaraju, Rama K Hochschild, Peter Grice, Don Gildea, Kevin Blackmore, Robert Bender, Carl A Kim, Chulho Chaudhary, Piyush Goscinski, Jason Herring, Jay Martin, Steven Houston, John |
description | In this paper we describe the architecture, design, and performance of the new cluster switch fabric and adapter called HPS (High Performance Switch). HPS delivers very low latency and very high bandwidth. We demonstrate latency of less than 4.3us MPI library; 1.8GB/s of delivered unidirectional bandwidth and 2.9GB/s of bidirectional bandwidth between 2 MPI tasks running on 1.9GHz Power 4+ IH based nodes. HPS also supports RDMA (remote direct memory access capability). A unique capability of RDMA over HPS is that reliable RDMA is supported over an underlying unreliable transport (unlike Infiniband and other RDMA transport protocols which depend on the underlying transport being reliable). We profile the performance of RDMA and its impact on striping for systems in which multiple network adapters are available to tasks of parallel jobs. |
doi_str_mv | 10.1007/978-3-540-30474-6_21 |
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HPS delivers very low latency and very high bandwidth. We demonstrate latency of less than 4.3us MPI library; 1.8GB/s of delivered unidirectional bandwidth and 2.9GB/s of bidirectional bandwidth between 2 MPI tasks running on 1.9GHz Power 4+ IH based nodes. HPS also supports RDMA (remote direct memory access capability). A unique capability of RDMA over HPS is that reliable RDMA is supported over an underlying unreliable transport (unlike Infiniband and other RDMA transport protocols which depend on the underlying transport being reliable). We profile the performance of RDMA and its impact on striping for systems in which multiple network adapters are available to tasks of parallel jobs.</description><identifier>ISSN: 0302-9743</identifier><identifier>ISBN: 9783540241294</identifier><identifier>ISBN: 3540241299</identifier><identifier>EISSN: 1611-3349</identifier><identifier>EISBN: 3540304746</identifier><identifier>EISBN: 9783540304746</identifier><identifier>DOI: 10.1007/978-3-540-30474-6_21</identifier><language>eng</language><publisher>Berlin, Heidelberg: Springer Berlin Heidelberg</publisher><subject>Algorithmics. Computability. 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Computer arithmetics</subject><subject>Applied sciences</subject><subject>Cache Line</subject><subject>Computer science; control theory; systems</subject><subject>Early Performance</subject><subject>Exact sciences and technology</subject><subject>Message Size</subject><subject>Switch Adapter</subject><subject>Theoretical computing</subject><subject>User Space</subject><issn>0302-9743</issn><issn>1611-3349</issn><isbn>9783540241294</isbn><isbn>3540241299</isbn><isbn>3540304746</isbn><isbn>9783540304746</isbn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2004</creationdate><recordtype>article</recordtype><recordid>eNotkE1PAyEQhvErsdb-Aw9cPKLAsAsca9PaJlWbqGfCsmBX2-4G1pj-e2l1LpO875PJ5EHohtE7Rqm811IRIIWgBKiQgpSGsxN0BTk5BuUpGrCSMQIg9BkaZf7QccG4FudokClOtBRwiUYpfdI8TFIlygGaj6NbN713_Xf02O5qPLVxs8crH0Mbt3bnPG4D7tceP_sfvHh4wvPVK57ZKjbuyI9r2_U-XqOLYDfJj_73EL3Ppm-TOVm-PC4m4yXpOFc9qZkCXbgAtZVacKeoVKWEKqhgJS1qLav8tBV1IcByGXjBqiJQcE5rJpWEIbr9u9vZ5OwmxPxik0wXm62Ne8NK0ApKljn-x6Vc7T58NFXbfiXDqDk4NdmRAZMtmaNCc3AKvxjLYfw</recordid><startdate>20040101</startdate><enddate>20040101</enddate><creator>Govindaraju, Rama K</creator><creator>Hochschild, Peter</creator><creator>Grice, Don</creator><creator>Gildea, Kevin</creator><creator>Blackmore, Robert</creator><creator>Bender, Carl A</creator><creator>Kim, Chulho</creator><creator>Chaudhary, Piyush</creator><creator>Goscinski, Jason</creator><creator>Herring, Jay</creator><creator>Martin, Steven</creator><creator>Houston, John</creator><general>Springer Berlin Heidelberg</general><general>Springer</general><scope>IQODW</scope></search><sort><creationdate>20040101</creationdate><title>Architecture and Early Performance of the New IBM HPS Fabric and Adapter</title><author>Govindaraju, Rama K ; Hochschild, Peter ; Grice, Don ; Gildea, Kevin ; Blackmore, Robert ; Bender, Carl A ; Kim, Chulho ; Chaudhary, Piyush ; Goscinski, Jason ; Herring, Jay ; Martin, Steven ; Houston, John</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-p228t-d18395cf3da7942c8078673bf8fa705d97b129a4d543a27f251b5f03cc9917873</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Algorithmics. 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subjects | Algorithmics. Computability. Computer arithmetics Applied sciences Cache Line Computer science control theory systems Early Performance Exact sciences and technology Message Size Switch Adapter Theoretical computing User Space |
title | Architecture and Early Performance of the New IBM HPS Fabric and Adapter |
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