A CAD tool for system-on-chip placement and routing with free-space optical interconnect
A wiring model for system-on-chips utilizing flexible free space optical interconnects is introduced In this paper, we develop a CAD tool for physical placement of modules in system-on-chips manufactured using the optical interconnect technology. The tool also determines which of the interconnect ar...
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creator | Chung-Seok Seo Chatterjee, A. |
description | A wiring model for system-on-chips utilizing flexible free space optical interconnects is introduced In this paper, we develop a CAD tool for physical placement of modules in system-on-chips manufactured using the optical interconnect technology. The tool also determines which of the interconnect are routed electrically and which are routed optically without exceeding the routing capacity of the optical interconnect while minimizing electrical wire length. About 50% reduction in largest delay of electrical wires is obtained through the use of optical interconnect (Performance improvement by a factor of 2). |
doi_str_mv | 10.1109/ICCD.2002.1106742 |
format | Conference Proceeding |
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The tool also determines which of the interconnect are routed electrically and which are routed optically without exceeding the routing capacity of the optical interconnect while minimizing electrical wire length. About 50% reduction in largest delay of electrical wires is obtained through the use of optical interconnect (Performance improvement by a factor of 2).</description><subject>Applied sciences</subject><subject>Computer aided manufacturing</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Flexible manufacturing systems</subject><subject>Integrated circuits</subject><subject>Optical interconnections</subject><subject>Pulp manufacturing</subject><subject>Routing</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Space technology</subject><subject>System-on-a-chip</subject><subject>Virtual manufacturing</subject><subject>Wire</subject><subject>Wiring</subject><issn>1063-6404</issn><issn>2576-6996</issn><isbn>0769517005</isbn><isbn>9780769517001</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2002</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkE1LAzEYhIMf4Lb6A8RLLh5Tk7xNsjmWrR-FghcFbyXNJjayzS5JRPrv3VLB0zDMwzAMQreMzhij-mHVNMsZp5QfrVRzfoYqLpQkUmt5jiZUSS2YolRcoGokgMg5nV-hSc5flNIamKrQxwI3iyUufd9h3yecD7m4Pekjsbsw4KEz1u1dLNjEFqf-u4T4iX9C2WGfnCN5GHPcDyVY0-EQi0u2j9HZco0uvemyu_nTKXp_enxrXsj69XnVLNYkMBCFMOdrwYyUW61br21raqZAgGNcUM2h3TJwwmiQXonac7ttoYWacnl0wGCK7k-9g8njBp9MtCFvhhT2Jh02TCgmOciRuztxwTn3H5-eg19BJV82</recordid><startdate>2002</startdate><enddate>2002</enddate><creator>Chung-Seok Seo</creator><creator>Chatterjee, A.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope><scope>IQODW</scope></search><sort><creationdate>2002</creationdate><title>A CAD tool for system-on-chip placement and routing with free-space optical interconnect</title><author>Chung-Seok Seo ; Chatterjee, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i135t-1ef851a66b99df9cda817353e1250923db13e5a936f758f2cbd3d3802658f2313</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2002</creationdate><topic>Applied sciences</topic><topic>Computer aided manufacturing</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Flexible manufacturing systems</topic><topic>Integrated circuits</topic><topic>Optical interconnections</topic><topic>Pulp manufacturing</topic><topic>Routing</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Space technology</topic><topic>System-on-a-chip</topic><topic>Virtual manufacturing</topic><topic>Wire</topic><topic>Wiring</topic><toplevel>online_resources</toplevel><creatorcontrib>Chung-Seok Seo</creatorcontrib><creatorcontrib>Chatterjee, A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chung-Seok Seo</au><au>Chatterjee, A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A CAD tool for system-on-chip placement and routing with free-space optical interconnect</atitle><btitle>Proceedings, IEEE International Conference on Computer Design</btitle><stitle>ICCD</stitle><date>2002</date><risdate>2002</risdate><spage>24</spage><epage>29</epage><pages>24-29</pages><issn>1063-6404</issn><eissn>2576-6996</eissn><isbn>0769517005</isbn><isbn>9780769517001</isbn><abstract>A wiring model for system-on-chips utilizing flexible free space optical interconnects is introduced In this paper, we develop a CAD tool for physical placement of modules in system-on-chips manufactured using the optical interconnect technology. The tool also determines which of the interconnect are routed electrically and which are routed optically without exceeding the routing capacity of the optical interconnect while minimizing electrical wire length. About 50% reduction in largest delay of electrical wires is obtained through the use of optical interconnect (Performance improvement by a factor of 2).</abstract><cop>Piscataway NJ</cop><pub>IEEE</pub><doi>10.1109/ICCD.2002.1106742</doi><tpages>6</tpages></addata></record> |
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ispartof | Proceedings, IEEE International Conference on Computer Design, 2002, p.24-29 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Applied sciences Computer aided manufacturing Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Flexible manufacturing systems Integrated circuits Optical interconnections Pulp manufacturing Routing Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Space technology System-on-a-chip Virtual manufacturing Wire Wiring |
title | A CAD tool for system-on-chip placement and routing with free-space optical interconnect |
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