Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units

In this paper, a method for the systematic generation of executing programs for processor element of parallel ASIC or FPGA-based systems like processor arrays is proposed. In this method, each processor element of an array has separate control unit and is controlled in an autonomous way, based on th...

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