Overview of IA-64 Explicitly Parallel Instruction Computing Architecture
The intention of this paper is to provide an overview of the IA-64 Explicitly Parallel Instruction Computing (EPIC) architecture. This quick overview of EPIC computer architecture evolution is provided to highlight some of the motivating factors for developing IA-64 architecture as well as showing t...
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| creator | Gepner, Pawel |
| description | The intention of this paper is to provide an overview of the IA-64 Explicitly Parallel Instruction Computing (EPIC) architecture. This quick overview of EPIC computer architecture evolution is provided to highlight some of the motivating factors for developing IA-64 architecture as well as showing the most important areas where the architecture has overcome traditional limitations in processor architecture. Before describing the important IA-64 architecture features I will outline the goals and strategy of IA-64 architecture. |
| doi_str_mv | 10.1007/3-540-48086-2_37 |
| format | Book Chapter |
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Computer arithmetics</topic><topic>Applied sciences</topic><topic>Branch Instruction</topic><topic>Branch Prediction</topic><topic>Computer science</topic><topic>Computer science; control theory; systems</topic><topic>Computer systems</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Hardware</topic><topic>Intel Corporation</topic><topic>Mathematical theory of computation</topic><topic>Memory Latency</topic><topic>Streaming SIMD Extension</topic><topic>Systems analysis & design</topic><topic>Theoretical computing</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Gepner, Pawel</creatorcontrib><collection>ProQuest Ebook Central - Book Chapters - Demo use only</collection><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Gepner, Pawel</au><au>Paprzycki, Marcin</au><au>Dongarra, Jack</au><au>Wyrzykowski, Roman</au><au>Wasniewski, Jerzy</au><au>Waśniewski, Jerzy</au><au>Wyrzykowski, Roman</au><au>Paprzycki, Marcin</au><au>Dongarra, Jack</au><format>book</format><genre>bookitem</genre><ristype>CHAP</ristype><atitle>Overview of IA-64 Explicitly Parallel Instruction Computing Architecture</atitle><btitle>Lecture notes in computer science</btitle><seriestitle>Lecture Notes in Computer Science</seriestitle><date>2002</date><risdate>2002</risdate><volume>2328</volume><spage>331</spage><epage>339</epage><pages>331-339</pages><issn>0302-9743</issn><eissn>1611-3349</eissn><isbn>3540437924</isbn><isbn>9783540437925</isbn><eisbn>9783540480860</eisbn><eisbn>3540480862</eisbn><abstract>The intention of this paper is to provide an overview of the IA-64 Explicitly Parallel Instruction Computing (EPIC) architecture. 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| fulltext | fulltext |
| identifier | ISSN: 0302-9743 |
| ispartof | Lecture notes in computer science, 2002, Vol.2328, p.331-339 |
| issn | 0302-9743 1611-3349 |
| language | eng |
| recordid | cdi_pascalfrancis_primary_14511362 |
| source | Springer Books |
| subjects | Algorithmics. Computability. Computer arithmetics Applied sciences Branch Instruction Branch Prediction Computer science Computer science control theory systems Computer systems Electronics Exact sciences and technology Hardware Intel Corporation Mathematical theory of computation Memory Latency Streaming SIMD Extension Systems analysis & design Theoretical computing |
| title | Overview of IA-64 Explicitly Parallel Instruction Computing Architecture |
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