An Emulator for Exploring RaPiD Configurable Computing Architectures
The RaPiD project at the University of Washington has been studying configurable computing architectures optimized for coarse-grained data and computation units and deep computation pipelines. This research targets applications in the signal and image-processing domain since they make the greatest d...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , |
|---|---|
| Format: | Buchkapitel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 26 |
|---|---|
| container_issue | |
| container_start_page | 17 |
| container_title | |
| container_volume | 2147 |
| creator | Fisher, Chris Rennie, Kevin Xing, Guanbin Berg, Stefan G. Bolding, Kevin Naegle, John Parshall, Daniel Portnov, Dmitriy Sulejmanpasic, Adnan Ebeling, Carl |
| description | The RaPiD project at the University of Washington has been studying configurable computing architectures optimized for coarse-grained data and computation units and deep computation pipelines. This research targets applications in the signal and image-processing domain since they make the greatest demand for computation and power in embedded and mobile computing applications, and these demands are increasing faster than Moore’s law. This paper describes the RaPiD Emulator, a system that will allow the exploration of alternative configurable architectures in the context of benchmark applications running in real-time. The RaPiD emulator provides enough FPGA gates to implement large RaPiD arrays, along with a high-performance streaming memory architecture and high-bandwidth data interfaces to a host processor and external devices. Running at 50 MHz, the emulator is able to achieve over 1 GMACs/second. |
| doi_str_mv | 10.1007/3-540-44687-7_3 |
| format | Book Chapter |
| fullrecord | <record><control><sourceid>proquest_pasca</sourceid><recordid>TN_cdi_pascalfrancis_primary_1019901</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EBC3072592_8_32</sourcerecordid><originalsourceid>FETCH-LOGICAL-c2913-29877e54318028c5e20b10709c7681f965423a243457e2ad13ae2f155b52cd593</originalsourceid><addsrcrecordid>eNpFUE1LAzEQjZ-41J699uA1mskkzeZY2voBBUX0HNI0265ud9dkF_Tfm36AA8Pw5r15MI-QG2B3wJi6RyoFo0KMc0WVwRMy1CrHtNuv8JRkMAagiEKf_XNcaC3OScaQcaqVwEuScUCNqBVckWGMnywVcgSOGZlN6tF821e2a8KoSD3_aasmlPV69GZfy9lo2tRFue6DXVY-gW3bdztyEtym7Lzr-uDjNbkobBX98DgH5ONh_j59oouXx-fpZEEd14CU61wpLwVCznjupOdsCUwx7dQ4h0KPpeBouUAhled2BWg9L0DKpeRuJTUOyO3Bt7XR2aoItnZlNG0otzb8GmCgNYMkowdZbHeP-GCWTfMVE292wRo0KSizT9EklPRwtA3Nd-9jZ_zuwPm6C7ZyG9t2PkSDTHGpuclNCu8Pjslylw</addsrcrecordid><sourcetype>Index Database</sourcetype><iscdi>true</iscdi><recordtype>book_chapter</recordtype><pqid>EBC3072592_8_32</pqid></control><display><type>book_chapter</type><title>An Emulator for Exploring RaPiD Configurable Computing Architectures</title><source>Springer Books</source><creator>Fisher, Chris ; Rennie, Kevin ; Xing, Guanbin ; Berg, Stefan G. ; Bolding, Kevin ; Naegle, John ; Parshall, Daniel ; Portnov, Dmitriy ; Sulejmanpasic, Adnan ; Ebeling, Carl</creator><contributor>Brebner, Gordon ; Woods, Roger ; Brebner, Gordon ; Woods, Roger</contributor><creatorcontrib>Fisher, Chris ; Rennie, Kevin ; Xing, Guanbin ; Berg, Stefan G. ; Bolding, Kevin ; Naegle, John ; Parshall, Daniel ; Portnov, Dmitriy ; Sulejmanpasic, Adnan ; Ebeling, Carl ; Brebner, Gordon ; Woods, Roger ; Brebner, Gordon ; Woods, Roger</creatorcontrib><description>The RaPiD project at the University of Washington has been studying configurable computing architectures optimized for coarse-grained data and computation units and deep computation pipelines. This research targets applications in the signal and image-processing domain since they make the greatest demand for computation and power in embedded and mobile computing applications, and these demands are increasing faster than Moore’s law. This paper describes the RaPiD Emulator, a system that will allow the exploration of alternative configurable architectures in the context of benchmark applications running in real-time. The RaPiD emulator provides enough FPGA gates to implement large RaPiD arrays, along with a high-performance streaming memory architecture and high-bandwidth data interfaces to a host processor and external devices. Running at 50 MHz, the emulator is able to achieve over 1 GMACs/second.</description><identifier>ISSN: 0302-9743</identifier><identifier>ISBN: 9783540424994</identifier><identifier>ISBN: 3540424997</identifier><identifier>EISSN: 1611-3349</identifier><identifier>EISBN: 9783540446873</identifier><identifier>EISBN: 3540446877</identifier><identifier>DOI: 10.1007/3-540-44687-7_3</identifier><identifier>OCLC: 213933971</identifier><identifier>LCCallNum: QA76.9.S88</identifier><language>eng</language><publisher>Germany: Springer Berlin / Heidelberg</publisher><subject>Address Stream ; Applied sciences ; Data Stream ; Electronics ; Exact sciences and technology ; Functional Unit ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Memory Module ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Stream Interface</subject><ispartof>Field-Programmable Logic and Applications, 2001, Vol.2147, p.17-26</ispartof><rights>Springer-Verlag Berlin Heidelberg 2001</rights><rights>2001 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c2913-29877e54318028c5e20b10709c7681f965423a243457e2ad13ae2f155b52cd593</citedby><relation>Lecture Notes in Computer Science</relation></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Uhttps://ebookcentral.proquest.com/covers/3072592-l.jpg</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/3-540-44687-7_3$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/3-540-44687-7_3$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>309,310,779,780,784,789,790,793,4047,4048,27923,38253,41440,42509</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=1019901$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><contributor>Brebner, Gordon</contributor><contributor>Woods, Roger</contributor><contributor>Brebner, Gordon</contributor><contributor>Woods, Roger</contributor><creatorcontrib>Fisher, Chris</creatorcontrib><creatorcontrib>Rennie, Kevin</creatorcontrib><creatorcontrib>Xing, Guanbin</creatorcontrib><creatorcontrib>Berg, Stefan G.</creatorcontrib><creatorcontrib>Bolding, Kevin</creatorcontrib><creatorcontrib>Naegle, John</creatorcontrib><creatorcontrib>Parshall, Daniel</creatorcontrib><creatorcontrib>Portnov, Dmitriy</creatorcontrib><creatorcontrib>Sulejmanpasic, Adnan</creatorcontrib><creatorcontrib>Ebeling, Carl</creatorcontrib><title>An Emulator for Exploring RaPiD Configurable Computing Architectures</title><title>Field-Programmable Logic and Applications</title><description>The RaPiD project at the University of Washington has been studying configurable computing architectures optimized for coarse-grained data and computation units and deep computation pipelines. This research targets applications in the signal and image-processing domain since they make the greatest demand for computation and power in embedded and mobile computing applications, and these demands are increasing faster than Moore’s law. This paper describes the RaPiD Emulator, a system that will allow the exploration of alternative configurable architectures in the context of benchmark applications running in real-time. The RaPiD emulator provides enough FPGA gates to implement large RaPiD arrays, along with a high-performance streaming memory architecture and high-bandwidth data interfaces to a host processor and external devices. Running at 50 MHz, the emulator is able to achieve over 1 GMACs/second.</description><subject>Address Stream</subject><subject>Applied sciences</subject><subject>Data Stream</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Functional Unit</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Memory Module</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Stream Interface</subject><issn>0302-9743</issn><issn>1611-3349</issn><isbn>9783540424994</isbn><isbn>3540424997</isbn><isbn>9783540446873</isbn><isbn>3540446877</isbn><fulltext>true</fulltext><rsrctype>book_chapter</rsrctype><creationdate>2001</creationdate><recordtype>book_chapter</recordtype><recordid>eNpFUE1LAzEQjZ-41J699uA1mskkzeZY2voBBUX0HNI0265ud9dkF_Tfm36AA8Pw5r15MI-QG2B3wJi6RyoFo0KMc0WVwRMy1CrHtNuv8JRkMAagiEKf_XNcaC3OScaQcaqVwEuScUCNqBVckWGMnywVcgSOGZlN6tF821e2a8KoSD3_aasmlPV69GZfy9lo2tRFue6DXVY-gW3bdztyEtym7Lzr-uDjNbkobBX98DgH5ONh_j59oouXx-fpZEEd14CU61wpLwVCznjupOdsCUwx7dQ4h0KPpeBouUAhled2BWg9L0DKpeRuJTUOyO3Bt7XR2aoItnZlNG0otzb8GmCgNYMkowdZbHeP-GCWTfMVE292wRo0KSizT9EklPRwtA3Nd-9jZ_zuwPm6C7ZyG9t2PkSDTHGpuclNCu8Pjslylw</recordid><startdate>2001</startdate><enddate>2001</enddate><creator>Fisher, Chris</creator><creator>Rennie, Kevin</creator><creator>Xing, Guanbin</creator><creator>Berg, Stefan G.</creator><creator>Bolding, Kevin</creator><creator>Naegle, John</creator><creator>Parshall, Daniel</creator><creator>Portnov, Dmitriy</creator><creator>Sulejmanpasic, Adnan</creator><creator>Ebeling, Carl</creator><general>Springer Berlin / Heidelberg</general><general>Springer Berlin Heidelberg</general><general>Springer</general><scope>FFUUA</scope><scope>IQODW</scope></search><sort><creationdate>2001</creationdate><title>An Emulator for Exploring RaPiD Configurable Computing Architectures</title><author>Fisher, Chris ; Rennie, Kevin ; Xing, Guanbin ; Berg, Stefan G. ; Bolding, Kevin ; Naegle, John ; Parshall, Daniel ; Portnov, Dmitriy ; Sulejmanpasic, Adnan ; Ebeling, Carl</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2913-29877e54318028c5e20b10709c7681f965423a243457e2ad13ae2f155b52cd593</frbrgroupid><rsrctype>book_chapters</rsrctype><prefilter>book_chapters</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Address Stream</topic><topic>Applied sciences</topic><topic>Data Stream</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Functional Unit</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Memory Module</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Stream Interface</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Fisher, Chris</creatorcontrib><creatorcontrib>Rennie, Kevin</creatorcontrib><creatorcontrib>Xing, Guanbin</creatorcontrib><creatorcontrib>Berg, Stefan G.</creatorcontrib><creatorcontrib>Bolding, Kevin</creatorcontrib><creatorcontrib>Naegle, John</creatorcontrib><creatorcontrib>Parshall, Daniel</creatorcontrib><creatorcontrib>Portnov, Dmitriy</creatorcontrib><creatorcontrib>Sulejmanpasic, Adnan</creatorcontrib><creatorcontrib>Ebeling, Carl</creatorcontrib><collection>ProQuest Ebook Central - Book Chapters - Demo use only</collection><collection>Pascal-Francis</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Fisher, Chris</au><au>Rennie, Kevin</au><au>Xing, Guanbin</au><au>Berg, Stefan G.</au><au>Bolding, Kevin</au><au>Naegle, John</au><au>Parshall, Daniel</au><au>Portnov, Dmitriy</au><au>Sulejmanpasic, Adnan</au><au>Ebeling, Carl</au><au>Brebner, Gordon</au><au>Woods, Roger</au><au>Brebner, Gordon</au><au>Woods, Roger</au><format>book</format><genre>bookitem</genre><ristype>CHAP</ristype><atitle>An Emulator for Exploring RaPiD Configurable Computing Architectures</atitle><btitle>Field-Programmable Logic and Applications</btitle><seriestitle>Lecture Notes in Computer Science</seriestitle><date>2001</date><risdate>2001</risdate><volume>2147</volume><spage>17</spage><epage>26</epage><pages>17-26</pages><issn>0302-9743</issn><eissn>1611-3349</eissn><isbn>9783540424994</isbn><isbn>3540424997</isbn><eisbn>9783540446873</eisbn><eisbn>3540446877</eisbn><abstract>The RaPiD project at the University of Washington has been studying configurable computing architectures optimized for coarse-grained data and computation units and deep computation pipelines. This research targets applications in the signal and image-processing domain since they make the greatest demand for computation and power in embedded and mobile computing applications, and these demands are increasing faster than Moore’s law. This paper describes the RaPiD Emulator, a system that will allow the exploration of alternative configurable architectures in the context of benchmark applications running in real-time. The RaPiD emulator provides enough FPGA gates to implement large RaPiD arrays, along with a high-performance streaming memory architecture and high-bandwidth data interfaces to a host processor and external devices. Running at 50 MHz, the emulator is able to achieve over 1 GMACs/second.</abstract><cop>Germany</cop><pub>Springer Berlin / Heidelberg</pub><doi>10.1007/3-540-44687-7_3</doi><oclcid>213933971</oclcid><tpages>10</tpages></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0302-9743 |
| ispartof | Field-Programmable Logic and Applications, 2001, Vol.2147, p.17-26 |
| issn | 0302-9743 1611-3349 |
| language | eng |
| recordid | cdi_pascalfrancis_primary_1019901 |
| source | Springer Books |
| subjects | Address Stream Applied sciences Data Stream Electronics Exact sciences and technology Functional Unit Integrated circuits Integrated circuits by function (including memories and processors) Memory Module Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Stream Interface |
| title | An Emulator for Exploring RaPiD Configurable Computing Architectures |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T15%3A52%3A46IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_pasca&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=bookitem&rft.atitle=An%20Emulator%20for%20Exploring%20RaPiD%20Configurable%20Computing%20Architectures&rft.btitle=Field-Programmable%20Logic%20and%20Applications&rft.au=Fisher,%20Chris&rft.date=2001&rft.volume=2147&rft.spage=17&rft.epage=26&rft.pages=17-26&rft.issn=0302-9743&rft.eissn=1611-3349&rft.isbn=9783540424994&rft.isbn_list=3540424997&rft_id=info:doi/10.1007/3-540-44687-7_3&rft_dat=%3Cproquest_pasca%3EEBC3072592_8_32%3C/proquest_pasca%3E%3Curl%3E%3C/url%3E&rft.eisbn=9783540446873&rft.eisbn_list=3540446877&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=EBC3072592_8_32&rft_id=info:pmid/&rfr_iscdi=true |