Design and implementation of the level 1 charged particle trigger for the BABAR detector
The environment of the high-luminosity PEP-II machine poses unique design challenges for the trigger system of the BABAR detector. These led to the adoption of a real-time parallel pipelined architecture for the trigger electronics which departs significantly from previous implementations at convent...
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Veröffentlicht in: | IEEE transactions on nuclear science 1999-12, Vol.46 (6), p.2006-2010 |
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container_title | IEEE transactions on nuclear science |
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creator | Berenyi, A. Chen, H.K. Dao, K. Dow, S.F. Gehrig, S.K. Gill, M.S. Grace, C. Jared, R.C. Johnson, J.K. Karcher, A. Kasen, D. Kirsten, F.A. Kral, J.F. LeClerc, C.M. Levi, M.E. Von Der Lippe, H. Liu, T.H. Marks, K.M. Meyer, A.B. Minor, R. Montgomery, A.H. Romosan, A. |
description | The environment of the high-luminosity PEP-II machine poses unique design challenges for the trigger system of the BABAR detector. These led to the adoption of a real-time parallel pipelined architecture for the trigger electronics which departs significantly from previous implementations at conventional e/sup +/e/sup -/ experiments. One challenge for the trigger designer lies in detecting low multiplicity physics events with high efficiency while keeping the background rate within the data acquisition limits. To achieve this difficult task, creative and innovative high-speed trigger algorithms were designed, simulated and implemented in Field Programmable Gate Arrays, using advanced CAD/CAE tools. The simulation results indicate that these algorithms will be able to perform all required tasks quickly and efficiently. This paper describes the design of the Level 1 Drift Chamber Trigger System of the BABAR detector, including the trigger algorithms, design and test methodology of the implementation, as well as test and simulation results. |
doi_str_mv | 10.1109/23.819272 |
format | Article |
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These led to the adoption of a real-time parallel pipelined architecture for the trigger electronics which departs significantly from previous implementations at conventional e/sup +/e/sup -/ experiments. One challenge for the trigger designer lies in detecting low multiplicity physics events with high efficiency while keeping the background rate within the data acquisition limits. To achieve this difficult task, creative and innovative high-speed trigger algorithms were designed, simulated and implemented in Field Programmable Gate Arrays, using advanced CAD/CAE tools. The simulation results indicate that these algorithms will be able to perform all required tasks quickly and efficiently. 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These led to the adoption of a real-time parallel pipelined architecture for the trigger electronics which departs significantly from previous implementations at conventional e/sup +/e/sup -/ experiments. One challenge for the trigger designer lies in detecting low multiplicity physics events with high efficiency while keeping the background rate within the data acquisition limits. To achieve this difficult task, creative and innovative high-speed trigger algorithms were designed, simulated and implemented in Field Programmable Gate Arrays, using advanced CAD/CAE tools. The simulation results indicate that these algorithms will be able to perform all required tasks quickly and efficiently. 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Chen, H.K. ; Dao, K. ; Dow, S.F. ; Gehrig, S.K. ; Gill, M.S. ; Grace, C. ; Jared, R.C. ; Johnson, J.K. ; Karcher, A. ; Kasen, D. ; Kirsten, F.A. ; Kral, J.F. ; LeClerc, C.M. ; Levi, M.E. ; Von Der Lippe, H. ; Liu, T.H. ; Marks, K.M. ; Meyer, A.B. ; Minor, R. ; Montgomery, A.H. ; Romosan, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c269t-e5feab5b27a17ef55b3babb7ffe2aeb786a59867dcb4271e8d9f74244c3f51e23</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1999</creationdate><topic>Algorithm design and analysis</topic><topic>ALGORITHMS</topic><topic>Chambers</topic><topic>Computer aided engineering</topic><topic>Computer simulation</topic><topic>COMPUTER-AIDED DESIGN</topic><topic>Data acquisition</topic><topic>DATA ACQUISITION SYSTEMS</topic><topic>Design automation</topic><topic>Design engineering</topic><topic>Design methodology</topic><topic>Detectors</topic><topic>DRIFT CHAMBERS</topic><topic>Electronics</topic><topic>Event detection</topic><topic>Field programmable gate arrays</topic><topic>High speed</topic><topic>IMPLEMENTATION</topic><topic>INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY</topic><topic>PARTICLE ACCELERATORS</topic><topic>PARTICLE IDENTIFICATION</topic><topic>PEP STORAGE RINGS</topic><topic>Physics</topic><topic>REAL TIME SYSTEMS</topic><topic>System testing</topic><topic>Tasks</topic><topic>TRIGGER CIRCUITS</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Berenyi, A.</creatorcontrib><creatorcontrib>Chen, H.K.</creatorcontrib><creatorcontrib>Dao, K.</creatorcontrib><creatorcontrib>Dow, S.F.</creatorcontrib><creatorcontrib>Gehrig, S.K.</creatorcontrib><creatorcontrib>Gill, M.S.</creatorcontrib><creatorcontrib>Grace, C.</creatorcontrib><creatorcontrib>Jared, R.C.</creatorcontrib><creatorcontrib>Johnson, J.K.</creatorcontrib><creatorcontrib>Karcher, A.</creatorcontrib><creatorcontrib>Kasen, D.</creatorcontrib><creatorcontrib>Kirsten, F.A.</creatorcontrib><creatorcontrib>Kral, J.F.</creatorcontrib><creatorcontrib>LeClerc, C.M.</creatorcontrib><creatorcontrib>Levi, M.E.</creatorcontrib><creatorcontrib>Von Der Lippe, H.</creatorcontrib><creatorcontrib>Liu, T.H.</creatorcontrib><creatorcontrib>Marks, K.M.</creatorcontrib><creatorcontrib>Meyer, A.B.</creatorcontrib><creatorcontrib>Minor, R.</creatorcontrib><creatorcontrib>Montgomery, A.H.</creatorcontrib><creatorcontrib>Romosan, A.</creatorcontrib><creatorcontrib>Lawrence Berkeley National Lab., CA (US)</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Xplore</collection><collection>CrossRef</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Electronics & Communications Abstracts</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>OSTI.GOV</collection><jtitle>IEEE transactions on nuclear science</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Berenyi, A.</au><au>Chen, H.K.</au><au>Dao, K.</au><au>Dow, S.F.</au><au>Gehrig, S.K.</au><au>Gill, M.S.</au><au>Grace, C.</au><au>Jared, R.C.</au><au>Johnson, J.K.</au><au>Karcher, A.</au><au>Kasen, D.</au><au>Kirsten, F.A.</au><au>Kral, J.F.</au><au>LeClerc, C.M.</au><au>Levi, M.E.</au><au>Von Der Lippe, H.</au><au>Liu, T.H.</au><au>Marks, K.M.</au><au>Meyer, A.B.</au><au>Minor, R.</au><au>Montgomery, A.H.</au><au>Romosan, A.</au><aucorp>Lawrence Berkeley National Lab., CA (US)</aucorp><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Design and implementation of the level 1 charged particle trigger for the BABAR detector</atitle><jtitle>IEEE transactions on nuclear science</jtitle><stitle>TNS</stitle><date>1999-12-01</date><risdate>1999</risdate><volume>46</volume><issue>6</issue><spage>2006</spage><epage>2010</epage><pages>2006-2010</pages><issn>0018-9499</issn><eissn>1558-1578</eissn><coden>IETNAE</coden><abstract>The environment of the high-luminosity PEP-II machine poses unique design challenges for the trigger system of the BABAR detector. These led to the adoption of a real-time parallel pipelined architecture for the trigger electronics which departs significantly from previous implementations at conventional e/sup +/e/sup -/ experiments. One challenge for the trigger designer lies in detecting low multiplicity physics events with high efficiency while keeping the background rate within the data acquisition limits. To achieve this difficult task, creative and innovative high-speed trigger algorithms were designed, simulated and implemented in Field Programmable Gate Arrays, using advanced CAD/CAE tools. The simulation results indicate that these algorithms will be able to perform all required tasks quickly and efficiently. This paper describes the design of the Level 1 Drift Chamber Trigger System of the BABAR detector, including the trigger algorithms, design and test methodology of the implementation, as well as test and simulation results.</abstract><cop>United States</cop><pub>IEEE</pub><doi>10.1109/23.819272</doi><tpages>5</tpages></addata></record> |
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subjects | Algorithm design and analysis ALGORITHMS Chambers Computer aided engineering Computer simulation COMPUTER-AIDED DESIGN Data acquisition DATA ACQUISITION SYSTEMS Design automation Design engineering Design methodology Detectors DRIFT CHAMBERS Electronics Event detection Field programmable gate arrays High speed IMPLEMENTATION INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY PARTICLE ACCELERATORS PARTICLE IDENTIFICATION PEP STORAGE RINGS Physics REAL TIME SYSTEMS System testing Tasks TRIGGER CIRCUITS |
title | Design and implementation of the level 1 charged particle trigger for the BABAR detector |
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