Electronics performance of the ATLAS New Small Wheel Micromegas wedges at CERN

A series of upgrades are planned for the LHC accelerator to increase its instantaneous luminosity to 7.5×1034cm−2s−1. The luminosity increase drastically impacts the ATLAS trigger and readout data rates. The present ATLAS small wheel muon detector will be replaced with a New Small Wheel (NSW) detector which is expected to be installed in the ATLAS underground cavern by the end of the Long Shutdown 2 of the LHC . With the final micromegas (MM) quadruplets (modules) already produced the activities concerning the integration of the modules into the final, fully equipped MM wedges, that will then be installed on the wheel structure on surface, are currently in full swing at CERN. One crucial part of the integration procedure concerns the installation, testing and validation of the on-detector electronics and readout chain for a very large system with more than 2.1 millions electronic channels in total. These include ∼4 thousands MM Front-End Boards (MMFE8), custom printed circuit boards each one housing eight 64-channel VMM Application Specific Integrated Circuits (ASICs) that interface with the ATLAS Trigger and Data Acquisition (TDAQ) system through ∼1 thousands data-driver cards (ADDC & L1DDC, respectively). The readout chain is based on optical link technology (GigaBit Transceiver links) connecting the back-end to the front-end electronics via the Front-End LInk eXchange (FELIX), a newly developed system that will serve as the next generation readout driver for ATLAS. Experience and performance results from the first large-scale electronics integration tests performed at CERN on final MM wedges, including system validation with cosmic-rays, are presented.