ZrO2/InAlN/GaN Metal--Oxide--Semiconductor Heterostructure Field-Effect Transistors with InAlN Barrier of Different Compositions
We report on InAlN/GaN heterostructure metal--oxide--semiconductor field-effect transistors (MOSHFETs) with an InAlN barrier layer of different compositions ($x_{\text{InN}} = 13$, 17, and 21%) and ZrO 2 gate-insulator/passivation. Static measurements yielded higher drain currents than those on unpa...
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Veröffentlicht in: | Jpn J Appl Phys 2013-08, Vol.52 (8), p.08JN07-08JN07-4 |
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container_title | Jpn J Appl Phys |
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creator | Gregušová, Dagmar Hušeková, Kristína Stoklas, Roman Blaho, Michal Jurkovič, Michal Carlin, Jean-Francois Grandjean, Nicolas Kordoš, Peter |
description | We report on InAlN/GaN heterostructure metal--oxide--semiconductor field-effect transistors (MOSHFETs) with an InAlN barrier layer of different compositions ($x_{\text{InN}} = 13$, 17, and 21%) and ZrO 2 gate-insulator/passivation. Static measurements yielded higher drain currents than those on unpassivated HFET counterparts and the currents increased with decreased $x_{\text{InN}}$. Post deposition annealing of the ZrO 2 insulator had less influence on the static performance but remarkable changes were observed on the capacitance--voltage characteristics. The capacitance hysteresis in both channel depletion and barrier accumulation regions was significantly suppressed after annealing. This indicates a reduction of the interfacial trap states and of fixed charge in the oxide. Pulsed current--voltage measurements confirmed this conclusion --- the gate lag of only ${\sim}80$% was evaluated for 200 ns pulse width, independently on the composition of the InAlN barrier layer. These results support an application of high permittivity ZrO 2 gate-insulator/passivation for the preparation of high-performance InAlN/GaN MOSHFETs. |
doi_str_mv | 10.7567/JJAP.52.08JN07 |
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Static measurements yielded higher drain currents than those on unpassivated HFET counterparts and the currents increased with decreased $x_{\text{InN}}$. Post deposition annealing of the ZrO 2 insulator had less influence on the static performance but remarkable changes were observed on the capacitance--voltage characteristics. The capacitance hysteresis in both channel depletion and barrier accumulation regions was significantly suppressed after annealing. This indicates a reduction of the interfacial trap states and of fixed charge in the oxide. Pulsed current--voltage measurements confirmed this conclusion --- the gate lag of only ${\sim}80$% was evaluated for 200 ns pulse width, independently on the composition of the InAlN barrier layer. These results support an application of high permittivity ZrO 2 gate-insulator/passivation for the preparation of high-performance InAlN/GaN MOSHFETs.</description><identifier>ISSN: 0021-4922</identifier><identifier>EISSN: 1347-4065</identifier><identifier>DOI: 10.7567/JJAP.52.08JN07</identifier><language>eng</language><publisher>The Japan Society of Applied Physics</publisher><ispartof>Jpn J Appl Phys, 2013-08, Vol.52 (8), p.08JN07-08JN07-4</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Gregušová, Dagmar</creatorcontrib><creatorcontrib>Hušeková, Kristína</creatorcontrib><creatorcontrib>Stoklas, Roman</creatorcontrib><creatorcontrib>Blaho, Michal</creatorcontrib><creatorcontrib>Jurkovič, Michal</creatorcontrib><creatorcontrib>Carlin, Jean-Francois</creatorcontrib><creatorcontrib>Grandjean, Nicolas</creatorcontrib><creatorcontrib>Kordoš, Peter</creatorcontrib><title>ZrO2/InAlN/GaN Metal--Oxide--Semiconductor Heterostructure Field-Effect Transistors with InAlN Barrier of Different Compositions</title><title>Jpn J Appl Phys</title><description>We report on InAlN/GaN heterostructure metal--oxide--semiconductor field-effect transistors (MOSHFETs) with an InAlN barrier layer of different compositions ($x_{\text{InN}} = 13$, 17, and 21%) and ZrO 2 gate-insulator/passivation. Static measurements yielded higher drain currents than those on unpassivated HFET counterparts and the currents increased with decreased $x_{\text{InN}}$. Post deposition annealing of the ZrO 2 insulator had less influence on the static performance but remarkable changes were observed on the capacitance--voltage characteristics. The capacitance hysteresis in both channel depletion and barrier accumulation regions was significantly suppressed after annealing. This indicates a reduction of the interfacial trap states and of fixed charge in the oxide. Pulsed current--voltage measurements confirmed this conclusion --- the gate lag of only ${\sim}80$% was evaluated for 200 ns pulse width, independently on the composition of the InAlN barrier layer. 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Static measurements yielded higher drain currents than those on unpassivated HFET counterparts and the currents increased with decreased $x_{\text{InN}}$. Post deposition annealing of the ZrO 2 insulator had less influence on the static performance but remarkable changes were observed on the capacitance--voltage characteristics. The capacitance hysteresis in both channel depletion and barrier accumulation regions was significantly suppressed after annealing. This indicates a reduction of the interfacial trap states and of fixed charge in the oxide. Pulsed current--voltage measurements confirmed this conclusion --- the gate lag of only ${\sim}80$% was evaluated for 200 ns pulse width, independently on the composition of the InAlN barrier layer. These results support an application of high permittivity ZrO 2 gate-insulator/passivation for the preparation of high-performance InAlN/GaN MOSHFETs.</abstract><pub>The Japan Society of Applied Physics</pub><doi>10.7567/JJAP.52.08JN07</doi></addata></record> |
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title | ZrO2/InAlN/GaN Metal--Oxide--Semiconductor Heterostructure Field-Effect Transistors with InAlN Barrier of Different Compositions |
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