Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors
We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs). Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductan...
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| Veröffentlicht in: | Quantum science and technology 2024-04, Vol.9 (2), p.25006 |
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| creator | Muthusubramanian, Nandini Finkel, Matvey Duivestein, Pim Zachariadis, Christos van der Meer, Sean L M Veen, Hendrik M Beekman, Marc W Stavenga, Thijs Bruno, Alessandro DiCarlo, Leonardo |
| description | We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs). Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to
∼
100
M
H
z
in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer center to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance. |
| doi_str_mv | 10.1088/2058-9565/ad199c |
| format | Article |
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∼
100
M
H
z
in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer center to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.</description><identifier>ISSN: 2058-9565</identifier><identifier>EISSN: 2058-9565</identifier><identifier>DOI: 10.1088/2058-9565/ad199c</identifier><language>eng</language><publisher>IOP Publishing</publisher><subject>Dolan-bridge junction ; frequency targeting ; Manhattan-style junction ; scalability ; through-silicon vias ; transmon</subject><ispartof>Quantum science and technology, 2024-04, Vol.9 (2), p.25006</ispartof><rights>2024 The Author(s). Published by IOP Publishing Ltd</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c306t-a27d3628c9548a08ca323b85302973b210c55c687ded5b6e752d9bdb87afae323</cites><orcidid>0000-0003-0332-0280</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://iopscience.iop.org/article/10.1088/2058-9565/ad199c/pdf$$EPDF$$P50$$Giop$$Hfree_for_read</linktopdf><link.rule.ids>314,777,781,27905,27906,53827,53874</link.rule.ids></links><search><creatorcontrib>Muthusubramanian, Nandini</creatorcontrib><creatorcontrib>Finkel, Matvey</creatorcontrib><creatorcontrib>Duivestein, Pim</creatorcontrib><creatorcontrib>Zachariadis, Christos</creatorcontrib><creatorcontrib>van der Meer, Sean L M</creatorcontrib><creatorcontrib>Veen, Hendrik M</creatorcontrib><creatorcontrib>Beekman, Marc W</creatorcontrib><creatorcontrib>Stavenga, Thijs</creatorcontrib><creatorcontrib>Bruno, Alessandro</creatorcontrib><creatorcontrib>DiCarlo, Leonardo</creatorcontrib><title>Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors</title><title>Quantum science and technology</title><addtitle>QST</addtitle><addtitle>Quantum Sci. Technol</addtitle><description>We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs). Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to
∼
100
M
H
z
in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer center to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.</description><subject>Dolan-bridge junction</subject><subject>frequency targeting</subject><subject>Manhattan-style junction</subject><subject>scalability</subject><subject>through-silicon vias</subject><subject>transmon</subject><issn>2058-9565</issn><issn>2058-9565</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><sourceid>O3W</sourceid><recordid>eNp1kL1PwzAQxS0EElXpzuiJidCLgxN7ROVbRSwgRsuxnTZVaqe2M3TjT8dVEGKA6Z7u3vvp9BA6z-EqB8bmBCjLOC3pXOqcc3WEJj-r41_6FM1C2ABAQfKcQzlBnx-yMT4LSnYGD7ZtnN-2cY9dg29dJ21W-1avDJZW41F2JgT8Iu1axpjuIe5T8tkF06-Ds3gzWBVbZwNOKByG3njlrB7S0q7wbpA2Dlvce6cSx_lwhk4a2QUz-55T9H5_97Z4zJavD0-Lm2WmCihjJkmli5Iwxek1k8CULEhRM1oA4VVRkxwUpapklTaa1qWpKNG81jWrZCNN8k4RjFzlXQjeNKL37Vb6vchBHEoUh5bEoSUxlpgiF2Okdb3YuMHb9KDYhSi4IAIIBShFr5tkvPzD-C_3C7Hdg9w</recordid><startdate>20240401</startdate><enddate>20240401</enddate><creator>Muthusubramanian, Nandini</creator><creator>Finkel, Matvey</creator><creator>Duivestein, Pim</creator><creator>Zachariadis, Christos</creator><creator>van der Meer, Sean L M</creator><creator>Veen, Hendrik M</creator><creator>Beekman, Marc W</creator><creator>Stavenga, Thijs</creator><creator>Bruno, Alessandro</creator><creator>DiCarlo, Leonardo</creator><general>IOP Publishing</general><scope>O3W</scope><scope>TSCCA</scope><scope>AAYXX</scope><scope>CITATION</scope><orcidid>https://orcid.org/0000-0003-0332-0280</orcidid></search><sort><creationdate>20240401</creationdate><title>Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors</title><author>Muthusubramanian, Nandini ; Finkel, Matvey ; Duivestein, Pim ; Zachariadis, Christos ; van der Meer, Sean L M ; Veen, Hendrik M ; Beekman, Marc W ; Stavenga, Thijs ; Bruno, Alessandro ; DiCarlo, Leonardo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c306t-a27d3628c9548a08ca323b85302973b210c55c687ded5b6e752d9bdb87afae323</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><topic>Dolan-bridge junction</topic><topic>frequency targeting</topic><topic>Manhattan-style junction</topic><topic>scalability</topic><topic>through-silicon vias</topic><topic>transmon</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Muthusubramanian, Nandini</creatorcontrib><creatorcontrib>Finkel, Matvey</creatorcontrib><creatorcontrib>Duivestein, Pim</creatorcontrib><creatorcontrib>Zachariadis, Christos</creatorcontrib><creatorcontrib>van der Meer, Sean L M</creatorcontrib><creatorcontrib>Veen, Hendrik M</creatorcontrib><creatorcontrib>Beekman, Marc W</creatorcontrib><creatorcontrib>Stavenga, Thijs</creatorcontrib><creatorcontrib>Bruno, Alessandro</creatorcontrib><creatorcontrib>DiCarlo, Leonardo</creatorcontrib><collection>IOP Publishing Free Content</collection><collection>IOPscience (Open Access)</collection><collection>CrossRef</collection><jtitle>Quantum science and technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Muthusubramanian, Nandini</au><au>Finkel, Matvey</au><au>Duivestein, Pim</au><au>Zachariadis, Christos</au><au>van der Meer, Sean L M</au><au>Veen, Hendrik M</au><au>Beekman, Marc W</au><au>Stavenga, Thijs</au><au>Bruno, Alessandro</au><au>DiCarlo, Leonardo</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors</atitle><jtitle>Quantum science and technology</jtitle><stitle>QST</stitle><addtitle>Quantum Sci. Technol</addtitle><date>2024-04-01</date><risdate>2024</risdate><volume>9</volume><issue>2</issue><spage>25006</spage><pages>25006-</pages><issn>2058-9565</issn><eissn>2058-9565</eissn><abstract>We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs). Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to
∼
100
M
H
z
in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer center to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.</abstract><pub>IOP Publishing</pub><doi>10.1088/2058-9565/ad199c</doi><tpages>11</tpages><orcidid>https://orcid.org/0000-0003-0332-0280</orcidid><oa>free_for_read</oa></addata></record> |
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| subjects | Dolan-bridge junction frequency targeting Manhattan-style junction scalability through-silicon vias transmon |
| title | Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors |
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