Computational CXL-Memory Solution for Accelerating Memory-Intensive Applications
CXL interface is the up-to-date technology that enables effective memory expansion by providing a memory-sharing protocol in configuring heterogeneous devices. However, its limited physical bandwidth can be a significant bottleneck for emerging data-intensive applications. In this work, we propose a...
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| Veröffentlicht in: | IEEE computer architecture letters 2023-01, Vol.22 (1), p.5-8 |
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| container_title | IEEE computer architecture letters |
| container_volume | 22 |
| creator | Sim, Joonseop Ahn, Soohong Ahn, Taeyoung Lee, Seungyong Rhee, Myunghyun Kim, Jooyoung Shin, Kwangsik Moon, Donguk Kim, Euiseok Park, Kyoung |
| description | CXL interface is the up-to-date technology that enables effective memory expansion by providing a memory-sharing protocol in configuring heterogeneous devices. However, its limited physical bandwidth can be a significant bottleneck for emerging data-intensive applications. In this work, we propose a novel CXL-based memory disaggregation architecture with a real-world prototype demonstration, which overcomes the bandwidth limitation of the CXL interface using near-data processing. The experimental results demonstrate that our design achieves up to 1.9× better performance/power efficiency than the existing CPU system. |
| doi_str_mv | 10.1109/LCA.2022.3226482 |
| format | Article |
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The experimental results demonstrate that our design achieves up to 1.9× better performance/power efficiency than the existing CPU system.</description><identifier>ISSN: 1556-6056</identifier><identifier>EISSN: 1556-6064</identifier><identifier>DOI: 10.1109/LCA.2022.3226482</identifier><identifier>CODEN: ICALC3</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Bandwidth ; Compute express link (CXL) ; Data processing ; Degradation ; Memory management ; near-data-processing (NDP) ; Power efficiency ; Protocols ; Prototypes ; Servers ; Software</subject><ispartof>IEEE computer architecture letters, 2023-01, Vol.22 (1), p.5-8</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The experimental results demonstrate that our design achieves up to 1.9× better performance/power efficiency than the existing CPU system.</description><subject>Bandwidth</subject><subject>Compute express link (CXL)</subject><subject>Data processing</subject><subject>Degradation</subject><subject>Memory management</subject><subject>near-data-processing (NDP)</subject><subject>Power efficiency</subject><subject>Protocols</subject><subject>Prototypes</subject><subject>Servers</subject><subject>Software</subject><issn>1556-6056</issn><issn>1556-6064</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1Lw0AQhhdRsFbvgpeA59T9mGw2xxD8KEQUVPC2bLezkpJm424q9N-bGulphuF5X5iHkGtGF4zR4q6uygWnnC8E5xIUPyEzlmUylVTC6XHP5Dm5iHFDKUihYEZeK7_td4MZGt-ZNqk-6_QZtz7skzff7g7XxPmQlNZii2HEuq9kAtJlN2AXmx9Myr5vG_vXES_JmTNtxKv_OScfD_fv1VNavzwuq7JOLQcY0rUTa8YV8IyD4ygRMljlSjkKyFRBYeUYGigMNSrPc8hlAdYoZ6m1igsr5uR26u2D_95hHPTG78L4Q9Q8lyIXQmRipOhE2eBjDOh0H5qtCXvNqD5406M3ffCm_72NkZsp0iDiES8KWSglxC9iZWjg</recordid><startdate>202301</startdate><enddate>202301</enddate><creator>Sim, Joonseop</creator><creator>Ahn, Soohong</creator><creator>Ahn, Taeyoung</creator><creator>Lee, Seungyong</creator><creator>Rhee, Myunghyun</creator><creator>Kim, Jooyoung</creator><creator>Shin, Kwangsik</creator><creator>Moon, Donguk</creator><creator>Kim, Euiseok</creator><creator>Park, Kyoung</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| subjects | Bandwidth Compute express link (CXL) Data processing Degradation Memory management near-data-processing (NDP) Power efficiency Protocols Prototypes Servers Software |
| title | Computational CXL-Memory Solution for Accelerating Memory-Intensive Applications |
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