Dynamic threshold voltage damascene metal gate MOSFET (DT-DMG-MOS) technology for very low voltage operation of under 0.7 V

We propose dynamic threshold-voltage damascene metal gate MOSFET (DT-DMG-MOS) technology for very low voltage operation (under 0.7 V). In this technology the metal gate is formed by the damascene gate process and directly connected to the well region (Si-body). Therefore, the connection between gate...

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Veröffentlicht in:IEEE transactions on electron devices 2002-03, Vol.49 (3), p.422-428
Hauptverfasser: Yagishita, A., Saito, T., Inuniiya, S., Matsuo, K., Tsunashima, Y., Suguro, K.
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container_end_page 428
container_issue 3
container_start_page 422
container_title IEEE transactions on electron devices
container_volume 49
creator Yagishita, A.
Saito, T.
Inuniiya, S.
Matsuo, K.
Tsunashima, Y.
Suguro, K.
description We propose dynamic threshold-voltage damascene metal gate MOSFET (DT-DMG-MOS) technology for very low voltage operation (under 0.7 V). In this technology the metal gate is formed by the damascene gate process and directly connected to the well region (Si-body). Therefore, the connection between gate electrode and silicon body can be more easily fabricated in the DT-DMG transistor than with conventional technologies. Furthermore, we found that low threshold voltage (about 0.15 V reduction for CMOS), high drive current, excellent subthreshold swing (about 60 mV/decade), and uniform electrical characteristics (great reduction of threshold voltage deviation) were obtained in the transistors with midgap work function metal gates (Al/TiN or W/TiN) and low supply voltage (0.7 V).
doi_str_mv 10.1109/16.987112
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Furthermore, we found that low threshold voltage (about 0.15 V reduction for CMOS), high drive current, excellent subthreshold swing (about 60 mV/decade), and uniform electrical characteristics (great reduction of threshold voltage deviation) were obtained in the transistors with midgap work function metal gates (Al/TiN or W/TiN) and low supply voltage (0.7 V).</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/16.987112</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Dynamics ; Gates ; MOSFETs ; Reduction ; Semiconductor devices ; Threshold voltage ; Tin ; Transistors</subject><ispartof>IEEE transactions on electron devices, 2002-03, Vol.49 (3), p.422-428</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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In this technology the metal gate is formed by the damascene gate process and directly connected to the well region (Si-body). Therefore, the connection between gate electrode and silicon body can be more easily fabricated in the DT-DMG transistor than with conventional technologies. Furthermore, we found that low threshold voltage (about 0.15 V reduction for CMOS), high drive current, excellent subthreshold swing (about 60 mV/decade), and uniform electrical characteristics (great reduction of threshold voltage deviation) were obtained in the transistors with midgap work function metal gates (Al/TiN or W/TiN) and low supply voltage (0.7 V).</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/16.987112</doi><tpages>7</tpages></addata></record>
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subjects Dynamics
Gates
MOSFETs
Reduction
Semiconductor devices
Threshold voltage
Tin
Transistors
title Dynamic threshold voltage damascene metal gate MOSFET (DT-DMG-MOS) technology for very low voltage operation of under 0.7 V
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