An Active Power Ripple Mitigation Strategy for Three-Phase Grid-Tied Inverters Under Unbalanced Grid Voltages
This letter proposes an active power ripple mitigation strategy for the three-phase three-wire grid-tied inverter. Under the unbalanced grid voltage scenarios, the double-line frequency oscillation will have occurred on the inverter output power and the dc-link voltage. Traditionally, the three-phas...
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Veröffentlicht in: | IEEE transactions on power electronics 2023-01, Vol.38 (1), p.27-33 |
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description | This letter proposes an active power ripple mitigation strategy for the three-phase three-wire grid-tied inverter. Under the unbalanced grid voltage scenarios, the double-line frequency oscillation will have occurred on the inverter output power and the dc-link voltage. Traditionally, the three-phase four-wire or the three-phase four-leg topology could be adopted to deal with this issue. Besides, the negative and the zero-sequence current component can be controlled to cancel out the power ripple. However, the circuit cost and control complexity might be increased. Therefore, a virtual phase-current regulation (VPCR) method is developed by adding compensation to the current feedback of the fault voltage. The compensation value is consistent with the voltage drop ratio, which can effectively offset the actual power ripple. The main feature of the VPCR is its simplicity, whereas it can be realized via the digital signal processor without adding extra circuit components. Theoretical analysis and mathematical derivations of the VPCR will also be revealed. Finally, a 3 kW prototype circuit with both simulation and experimental results verify the performance and feasibility of the proposed strategy. The experimental results show that the output power ripple can be eliminated with 64.3% via the proposed VPCR. |
doi_str_mv | 10.1109/TPEL.2022.3198410 |
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Under the unbalanced grid voltage scenarios, the double-line frequency oscillation will have occurred on the inverter output power and the dc-link voltage. Traditionally, the three-phase four-wire or the three-phase four-leg topology could be adopted to deal with this issue. Besides, the negative and the zero-sequence current component can be controlled to cancel out the power ripple. However, the circuit cost and control complexity might be increased. Therefore, a virtual phase-current regulation (VPCR) method is developed by adding compensation to the current feedback of the fault voltage. The compensation value is consistent with the voltage drop ratio, which can effectively offset the actual power ripple. The main feature of the VPCR is its simplicity, whereas it can be realized via the digital signal processor without adding extra circuit components. Theoretical analysis and mathematical derivations of the VPCR will also be revealed. Finally, a 3 kW prototype circuit with both simulation and experimental results verify the performance and feasibility of the proposed strategy. The experimental results show that the output power ripple can be eliminated with 64.3% via the proposed VPCR.</description><identifier>ISSN: 0885-8993</identifier><identifier>EISSN: 1941-0107</identifier><identifier>DOI: 10.1109/TPEL.2022.3198410</identifier><identifier>CODEN: ITPEE8</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Circuit faults ; Circuits ; Compensation ; Digital signal processors ; Inverters ; Microprocessors ; Oscillators ; Power ripple mitigation ; Power system stability ; Ripples ; Signal processing ; three-phase three-wire inverter ; Topology ; Unbalance ; unbalanced grid voltages ; Voltage control ; Voltage drop ; Wire ; Zero sequence current</subject><ispartof>IEEE transactions on power electronics, 2023-01, Vol.38 (1), p.27-33</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c223t-5a3d7f33434865c405523bf344c88b7136e3ae6abef3a35b8b573579ad6510ec3</citedby><cites>FETCH-LOGICAL-c223t-5a3d7f33434865c405523bf344c88b7136e3ae6abef3a35b8b573579ad6510ec3</cites><orcidid>0000-0002-8075-9679</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9857608$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9857608$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Tang, Cheng-Yu</creatorcontrib><creatorcontrib>Jheng, Jia-He</creatorcontrib><title>An Active Power Ripple Mitigation Strategy for Three-Phase Grid-Tied Inverters Under Unbalanced Grid Voltages</title><title>IEEE transactions on power electronics</title><addtitle>TPEL</addtitle><description>This letter proposes an active power ripple mitigation strategy for the three-phase three-wire grid-tied inverter. Under the unbalanced grid voltage scenarios, the double-line frequency oscillation will have occurred on the inverter output power and the dc-link voltage. Traditionally, the three-phase four-wire or the three-phase four-leg topology could be adopted to deal with this issue. Besides, the negative and the zero-sequence current component can be controlled to cancel out the power ripple. However, the circuit cost and control complexity might be increased. Therefore, a virtual phase-current regulation (VPCR) method is developed by adding compensation to the current feedback of the fault voltage. The compensation value is consistent with the voltage drop ratio, which can effectively offset the actual power ripple. The main feature of the VPCR is its simplicity, whereas it can be realized via the digital signal processor without adding extra circuit components. Theoretical analysis and mathematical derivations of the VPCR will also be revealed. Finally, a 3 kW prototype circuit with both simulation and experimental results verify the performance and feasibility of the proposed strategy. The experimental results show that the output power ripple can be eliminated with 64.3% via the proposed VPCR.</description><subject>Circuit faults</subject><subject>Circuits</subject><subject>Compensation</subject><subject>Digital signal processors</subject><subject>Inverters</subject><subject>Microprocessors</subject><subject>Oscillators</subject><subject>Power ripple mitigation</subject><subject>Power system stability</subject><subject>Ripples</subject><subject>Signal processing</subject><subject>three-phase three-wire inverter</subject><subject>Topology</subject><subject>Unbalance</subject><subject>unbalanced grid voltages</subject><subject>Voltage control</subject><subject>Voltage drop</subject><subject>Wire</subject><subject>Zero sequence current</subject><issn>0885-8993</issn><issn>1941-0107</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1PwkAURSdGExH9AcbNJK6L89lOl4QgkmAkWtxOpu0rDCktzgwY_r1tIK7e4p57X3IQeqRkRClJX7LldDFihLERp6kSlFyhAU0FjQglyTUaEKVkpNKU36I777eEUCEJHaDduMHjItgj4GX7Cw5_2v2-Bvxug12bYNsGfwVnAqxPuGodzjYOIFpujAc8c7aMMgslnjdHcAGcx6um7EZWTW5q0xRd1EP4u62DWYO_RzeVqT08XO4QrV6n2eQtWnzM5pPxIioY4yGShpdJxbngQsWyEERKxvOKC1EolSeUx8ANxCaHihsuc5XLhMskNWUsKYGCD9HzeXfv2p8D-KC37cE13UvNEkYFUyQhHUXPVOFa7x1Ueu_szriTpkT3VnVvVfdW9cVq13k6dywA_POpkklMFP8DnC5y3w</recordid><startdate>202301</startdate><enddate>202301</enddate><creator>Tang, Cheng-Yu</creator><creator>Jheng, Jia-He</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>FR3</scope><scope>JQ2</scope><scope>KR7</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-8075-9679</orcidid></search><sort><creationdate>202301</creationdate><title>An Active Power Ripple Mitigation Strategy for Three-Phase Grid-Tied Inverters Under Unbalanced Grid Voltages</title><author>Tang, Cheng-Yu ; Jheng, Jia-He</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c223t-5a3d7f33434865c405523bf344c88b7136e3ae6abef3a35b8b573579ad6510ec3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Circuit faults</topic><topic>Circuits</topic><topic>Compensation</topic><topic>Digital signal processors</topic><topic>Inverters</topic><topic>Microprocessors</topic><topic>Oscillators</topic><topic>Power ripple mitigation</topic><topic>Power system stability</topic><topic>Ripples</topic><topic>Signal processing</topic><topic>three-phase three-wire inverter</topic><topic>Topology</topic><topic>Unbalance</topic><topic>unbalanced grid voltages</topic><topic>Voltage control</topic><topic>Voltage drop</topic><topic>Wire</topic><topic>Zero sequence current</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tang, Cheng-Yu</creatorcontrib><creatorcontrib>Jheng, Jia-He</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on power electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tang, Cheng-Yu</au><au>Jheng, Jia-He</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>An Active Power Ripple Mitigation Strategy for Three-Phase Grid-Tied Inverters Under Unbalanced Grid Voltages</atitle><jtitle>IEEE transactions on power electronics</jtitle><stitle>TPEL</stitle><date>2023-01</date><risdate>2023</risdate><volume>38</volume><issue>1</issue><spage>27</spage><epage>33</epage><pages>27-33</pages><issn>0885-8993</issn><eissn>1941-0107</eissn><coden>ITPEE8</coden><abstract>This letter proposes an active power ripple mitigation strategy for the three-phase three-wire grid-tied inverter. Under the unbalanced grid voltage scenarios, the double-line frequency oscillation will have occurred on the inverter output power and the dc-link voltage. Traditionally, the three-phase four-wire or the three-phase four-leg topology could be adopted to deal with this issue. Besides, the negative and the zero-sequence current component can be controlled to cancel out the power ripple. However, the circuit cost and control complexity might be increased. Therefore, a virtual phase-current regulation (VPCR) method is developed by adding compensation to the current feedback of the fault voltage. The compensation value is consistent with the voltage drop ratio, which can effectively offset the actual power ripple. The main feature of the VPCR is its simplicity, whereas it can be realized via the digital signal processor without adding extra circuit components. Theoretical analysis and mathematical derivations of the VPCR will also be revealed. Finally, a 3 kW prototype circuit with both simulation and experimental results verify the performance and feasibility of the proposed strategy. The experimental results show that the output power ripple can be eliminated with 64.3% via the proposed VPCR.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TPEL.2022.3198410</doi><tpages>7</tpages><orcidid>https://orcid.org/0000-0002-8075-9679</orcidid></addata></record> |
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subjects | Circuit faults Circuits Compensation Digital signal processors Inverters Microprocessors Oscillators Power ripple mitigation Power system stability Ripples Signal processing three-phase three-wire inverter Topology Unbalance unbalanced grid voltages Voltage control Voltage drop Wire Zero sequence current |
title | An Active Power Ripple Mitigation Strategy for Three-Phase Grid-Tied Inverters Under Unbalanced Grid Voltages |
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