112G+7-Bit DAC-Based Transmitter in 7-nm FinFET With PAM4/6/8 Modulation
This letter describes a 56 Gbaud 7-bit DAC-based transmitter (TX) demonstrating data rates of 112, 140, and 168 Gb/s in PAM4, PAM6, and PAM8, respectively. The TX with 1.2-Vppd high-swing driver is implemented in a 7-nm FinFET process. Time domain analysis is performed to compare PAM modulation form...
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Veröffentlicht in: | IEEE solid-state circuits letters 2022, Vol.5, p.21-24 |
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creator | Chong, Euhan Shahi, Sina N. Musa, Faisal A. Mustafa, Ahmed N. Krotnev, Peter Madeira, Paul Tonietto, Davide |
description | This letter describes a 56 Gbaud 7-bit DAC-based transmitter (TX) demonstrating data rates of 112, 140, and 168 Gb/s in PAM4, PAM6, and PAM8, respectively. The TX with 1.2-Vppd high-swing driver is implemented in a 7-nm FinFET process. Time domain analysis is performed to compare PAM modulation formats. The power efficiency is 1.5 pJ/b (PAM4) and 1.0 pJ/b (PAM8). |
doi_str_mv | 10.1109/LSSC.2022.3150251 |
format | Article |
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(IEEE) 2022</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-7bd4658d86d4ac9d2335096b5934debeda284539db7ec160e1f3460db0be4b9c3</citedby><cites>FETCH-LOGICAL-c293t-7bd4658d86d4ac9d2335096b5934debeda284539db7ec160e1f3460db0be4b9c3</cites><orcidid>0000-0001-5041-6408 ; 0000-0002-7319-143X ; 0000-0003-0434-4882</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9708424$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,4024,27923,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9708424$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chong, Euhan</creatorcontrib><creatorcontrib>Shahi, Sina N.</creatorcontrib><creatorcontrib>Musa, Faisal A.</creatorcontrib><creatorcontrib>Mustafa, Ahmed N.</creatorcontrib><creatorcontrib>Krotnev, Peter</creatorcontrib><creatorcontrib>Madeira, Paul</creatorcontrib><creatorcontrib>Tonietto, Davide</creatorcontrib><title>112G+7-Bit DAC-Based Transmitter in 7-nm FinFET With PAM4/6/8 Modulation</title><title>IEEE solid-state circuits letters</title><addtitle>LSSC</addtitle><description>This letter describes a 56 Gbaud 7-bit DAC-based transmitter (TX) demonstrating data rates of 112, 140, and 168 Gb/s in PAM4, PAM6, and PAM8, respectively. The TX with 1.2-Vppd high-swing driver is implemented in a 7-nm FinFET process. Time domain analysis is performed to compare PAM modulation formats. The power efficiency is 1.5 pJ/b (PAM4) and 1.0 pJ/b (PAM8).</description><subject>Clocks</subject><subject>DAC</subject><subject>Detectors</subject><subject>Loss measurement</subject><subject>PAM4</subject><subject>PAM6</subject><subject>PAM8</subject><subject>Power efficiency</subject><subject>Pulse amplitude modulation</subject><subject>Sensitivity</subject><subject>SERDES</subject><subject>Signal to noise ratio</subject><subject>Time domain analysis</subject><subject>transmitter (TX)</subject><subject>Transmitters</subject><issn>2573-9603</issn><issn>2573-9603</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpNkE1rAjEURUNpoWL9AaWbQJcl-vI5k6VOqxaUFrR0GSaTSCM6Y5Nx0X_fEaV09e7i3PvgIHRPYUgp6NFitSqGDBgbciqBSXqFekxmnGgF_PpfvkWDlLYAQDVVHPIemlPKZk8ZmYQWP48LMimTd3gdyzrtQ9v6iEONM1Lv8TTU05c1_gztF34fL8VIjXK8bNxxV7ahqe_QzabcJT-43D766PBiThZvs9divCAV07wlmXVCydzlyomy0o5xLkErKzUXzlvvSpYLybWzma-oAk83XChwFqwXVle8jx7Pu4fYfB99as22Oca6e2mY4lRLDVJ0FD1TVWxSin5jDjHsy_hjKJiTM3NyZk7OzMVZ13k4d4L3_o_XGeSCCf4LzqZjIA</recordid><startdate>2022</startdate><enddate>2022</enddate><creator>Chong, Euhan</creator><creator>Shahi, Sina N.</creator><creator>Musa, Faisal A.</creator><creator>Mustafa, Ahmed N.</creator><creator>Krotnev, Peter</creator><creator>Madeira, Paul</creator><creator>Tonietto, Davide</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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The TX with 1.2-Vppd high-swing driver is implemented in a 7-nm FinFET process. Time domain analysis is performed to compare PAM modulation formats. The power efficiency is 1.5 pJ/b (PAM4) and 1.0 pJ/b (PAM8).</abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/LSSC.2022.3150251</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0001-5041-6408</orcidid><orcidid>https://orcid.org/0000-0002-7319-143X</orcidid><orcidid>https://orcid.org/0000-0003-0434-4882</orcidid></addata></record> |
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subjects | Clocks DAC Detectors Loss measurement PAM4 PAM6 PAM8 Power efficiency Pulse amplitude modulation Sensitivity SERDES Signal to noise ratio Time domain analysis transmitter (TX) Transmitters |
title | 112G+7-Bit DAC-Based Transmitter in 7-nm FinFET With PAM4/6/8 Modulation |
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