Gate Voltage Pulse Rising Edge Dependent Dynamic Hot Carrier Degradation in Poly-Si Thin-Film Transistors
Dynamic degradation becomes a critical issue for thin-film transistors (TFTs) used in emerging new displays driven by high frequency gate voltage {V}_{\text {G}} pulses. In this study, {V}_{\text {G}} pulse rising edge dependent dynamic hot carrier degradation of poly-Si TFTs is investigated. It...
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| Veröffentlicht in: | IEEE electron device letters 2021-11, Vol.42 (11), p.1615-1618 |
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| creator | Chen, Lekai Wang, Mingxiang Zhang, Dongli Wang, Huaisheng |
| description | Dynamic degradation becomes a critical issue for thin-film transistors (TFTs) used in emerging new displays driven by high frequency gate voltage {V}_{\text {G}} pulses. In this study, {V}_{\text {G}} pulse rising edge dependent dynamic hot carrier degradation of poly-Si TFTs is investigated. It is demonstrated that rising edge of {V}_{\text {G}} pulses which swing within the OFF-state of TFTs causes the degradation, while that of normal {V}_{\text {G}} pulses which switch between the ON and OFF states across the flat band voltage {V}_{\text {FB}} of TFTs does not. Based on transient TCAD simulation, the underlying mechanism of rising edge dependent degradation is proposed, which is based on the non-equilibrium PN junction degradation model previously proposed to explain {V}_{\text {G}} pulse falling edge dependent degradation of poly-Si TFTs. Hence, the dynamic degradation model of poly-Si TFTs related to both rising and falling edge of the {V}_{\text {G}} pulses can be unified now, which is applicable to fast gate pulses with steep rising and/or falling edges in sub- \mu \text{s} level. |
| doi_str_mv | 10.1109/LED.2021.3110916 |
| format | Article |
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In this study, <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulse rising edge dependent dynamic hot carrier degradation of poly-Si TFTs is investigated. It is demonstrated that rising edge of <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses which swing within the OFF-state of TFTs causes the degradation, while that of normal <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses which switch between the ON and OFF states across the flat band voltage <inline-formula> <tex-math notation="LaTeX">{V}_{\text {FB}} </tex-math></inline-formula> of TFTs does not. Based on transient TCAD simulation, the underlying mechanism of rising edge dependent degradation is proposed, which is based on the non-equilibrium PN junction degradation model previously proposed to explain <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulse falling edge dependent degradation of poly-Si TFTs. Hence, the dynamic degradation model of poly-Si TFTs related to both rising and falling edge of the <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses can be unified now, which is applicable to fast gate pulses with steep rising and/or falling edges in sub-<inline-formula> <tex-math notation="LaTeX">\mu \text{s} </tex-math></inline-formula> level.]]></description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2021.3110916</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Degradation ; degradation model ; Electric potential ; hot carrier degradation ; Hot carriers ; Junctions ; Logic gates ; P-n junctions ; Polysilicon ; rising edge ; Semiconductor devices ; Stress ; Thin film transistors ; Thin film transistors (TFTs) ; Transient analysis ; Transistors ; Voltage</subject><ispartof>IEEE electron device letters, 2021-11, Vol.42 (11), p.1615-1618</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c244t-92b528e814805fb95187f535ecdc24666d25b962d7f3d059a4595a9033d287e03</cites><orcidid>0000-0002-0467-5852 ; 0000-0002-0556-5532 ; 0000-0002-6087-4979</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9530534$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9530534$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chen, Lekai</creatorcontrib><creatorcontrib>Wang, Mingxiang</creatorcontrib><creatorcontrib>Zhang, Dongli</creatorcontrib><creatorcontrib>Wang, Huaisheng</creatorcontrib><title>Gate Voltage Pulse Rising Edge Dependent Dynamic Hot Carrier Degradation in Poly-Si Thin-Film Transistors</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description><![CDATA[Dynamic degradation becomes a critical issue for thin-film transistors (TFTs) used in emerging new displays driven by high frequency gate voltage <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses. In this study, <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulse rising edge dependent dynamic hot carrier degradation of poly-Si TFTs is investigated. It is demonstrated that rising edge of <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses which swing within the OFF-state of TFTs causes the degradation, while that of normal <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses which switch between the ON and OFF states across the flat band voltage <inline-formula> <tex-math notation="LaTeX">{V}_{\text {FB}} </tex-math></inline-formula> of TFTs does not. Based on transient TCAD simulation, the underlying mechanism of rising edge dependent degradation is proposed, which is based on the non-equilibrium PN junction degradation model previously proposed to explain <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulse falling edge dependent degradation of poly-Si TFTs. Hence, the dynamic degradation model of poly-Si TFTs related to both rising and falling edge of the <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses can be unified now, which is applicable to fast gate pulses with steep rising and/or falling edges in sub-<inline-formula> <tex-math notation="LaTeX">\mu \text{s} </tex-math></inline-formula> level.]]></description><subject>Degradation</subject><subject>degradation model</subject><subject>Electric potential</subject><subject>hot carrier degradation</subject><subject>Hot carriers</subject><subject>Junctions</subject><subject>Logic gates</subject><subject>P-n junctions</subject><subject>Polysilicon</subject><subject>rising edge</subject><subject>Semiconductor devices</subject><subject>Stress</subject><subject>Thin film transistors</subject><subject>Thin film transistors (TFTs)</subject><subject>Transient analysis</subject><subject>Transistors</subject><subject>Voltage</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LAzEQhoMoWKt3wUvA89bJx-xujtJPoWDR6nVJd7M1pU1qsj3035vS4mmYmeedgYeQRwYDxkC9zMejAQfOBuLUsvyK9BhimQHm4pr0oJAsEwzyW3IX4waASVnIHrFT3Rn67bedXhu6OGyjoR82Wrem4yZNRmZvXGNcR0dHp3e2pjPf0aEOwZqQtuugG91Z76h1dOG3x-zT0uWPddnEbnd0GbSLNnY-xHty0-p0_uFS--RrMl4OZ9n8ffo2fJ1nNZeyyxRfIS9NyWQJ2K4UsrJoUaCpmwTked5wXKmcN0UrGkClJSrUCoRoeFkYEH3yfL67D_73YGJXbfwhuPSy4ljmqICVmCg4U3XwMQbTVvtgdzocKwbVyWCVhFYnodVFaIo8nSPWGPOPKxSAQoo_yvpvsg</recordid><startdate>20211101</startdate><enddate>20211101</enddate><creator>Chen, Lekai</creator><creator>Wang, Mingxiang</creator><creator>Zhang, Dongli</creator><creator>Wang, Huaisheng</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-0467-5852</orcidid><orcidid>https://orcid.org/0000-0002-0556-5532</orcidid><orcidid>https://orcid.org/0000-0002-6087-4979</orcidid></search><sort><creationdate>20211101</creationdate><title>Gate Voltage Pulse Rising Edge Dependent Dynamic Hot Carrier Degradation in Poly-Si Thin-Film Transistors</title><author>Chen, Lekai ; Wang, Mingxiang ; Zhang, Dongli ; Wang, Huaisheng</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c244t-92b528e814805fb95187f535ecdc24666d25b962d7f3d059a4595a9033d287e03</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Degradation</topic><topic>degradation model</topic><topic>Electric potential</topic><topic>hot carrier degradation</topic><topic>Hot carriers</topic><topic>Junctions</topic><topic>Logic gates</topic><topic>P-n junctions</topic><topic>Polysilicon</topic><topic>rising edge</topic><topic>Semiconductor devices</topic><topic>Stress</topic><topic>Thin film transistors</topic><topic>Thin film transistors (TFTs)</topic><topic>Transient analysis</topic><topic>Transistors</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chen, Lekai</creatorcontrib><creatorcontrib>Wang, Mingxiang</creatorcontrib><creatorcontrib>Zhang, Dongli</creatorcontrib><creatorcontrib>Wang, Huaisheng</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Lekai</au><au>Wang, Mingxiang</au><au>Zhang, Dongli</au><au>Wang, Huaisheng</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Gate Voltage Pulse Rising Edge Dependent Dynamic Hot Carrier Degradation in Poly-Si Thin-Film Transistors</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2021-11-01</date><risdate>2021</risdate><volume>42</volume><issue>11</issue><spage>1615</spage><epage>1618</epage><pages>1615-1618</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract><![CDATA[Dynamic degradation becomes a critical issue for thin-film transistors (TFTs) used in emerging new displays driven by high frequency gate voltage <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses. In this study, <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulse rising edge dependent dynamic hot carrier degradation of poly-Si TFTs is investigated. It is demonstrated that rising edge of <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses which swing within the OFF-state of TFTs causes the degradation, while that of normal <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses which switch between the ON and OFF states across the flat band voltage <inline-formula> <tex-math notation="LaTeX">{V}_{\text {FB}} </tex-math></inline-formula> of TFTs does not. Based on transient TCAD simulation, the underlying mechanism of rising edge dependent degradation is proposed, which is based on the non-equilibrium PN junction degradation model previously proposed to explain <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulse falling edge dependent degradation of poly-Si TFTs. Hence, the dynamic degradation model of poly-Si TFTs related to both rising and falling edge of the <inline-formula> <tex-math notation="LaTeX">{V}_{\text {G}} </tex-math></inline-formula> pulses can be unified now, which is applicable to fast gate pulses with steep rising and/or falling edges in sub-<inline-formula> <tex-math notation="LaTeX">\mu \text{s} </tex-math></inline-formula> level.]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2021.3110916</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0002-0467-5852</orcidid><orcidid>https://orcid.org/0000-0002-0556-5532</orcidid><orcidid>https://orcid.org/0000-0002-6087-4979</orcidid></addata></record> |
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| subjects | Degradation degradation model Electric potential hot carrier degradation Hot carriers Junctions Logic gates P-n junctions Polysilicon rising edge Semiconductor devices Stress Thin film transistors Thin film transistors (TFTs) Transient analysis Transistors Voltage |
| title | Gate Voltage Pulse Rising Edge Dependent Dynamic Hot Carrier Degradation in Poly-Si Thin-Film Transistors |
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