Hybrid Memory Buffer Microarchitecture for High-Radix Routers

Hierarchical high-radix router microarchitecture consisting of small SRAM-based intermediate buffers has been used in large-scale supercomputers interconnection networks. While hierarchical organization enables efficient scaling to higher switch port count, it requires intermediate buffers which can...

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Veröffentlicht in:	IEEE transactions on computers 2022-11, Vol.71 (11), p.2888-2902
Hauptverfasser:	Li, Cunlu, Dong, Dezun, Liao, Xiangke, Kim, John
Format:	Artikel
Sprache:	eng
Schlagworte:	Buffers Communications traffic Computer architecture Hierarchical router high-radix router Magnetic tunneling Microarchitecture Organizations Ports (computers) Random access memory Routers STT-MRAM Supercomputers Switches System-on-chip
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