Impact of ESD-induced soft drain junction damage on CMOS product lifetime
The impact of ESD-induced soft drain junction damage on product lifetime was investigated. Several thousand input-output (I/O) pads of a 0.35 /spl mu/m CMOS IC were stressed by ESD (electrostatic discharge) and subsequently subjected to bakes, ESD re-stress and high temperature operating life tests....
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creator | Reiner, J.C. Keller, T. Jaggi, H. Mira, S. |
description | The impact of ESD-induced soft drain junction damage on product lifetime was investigated. Several thousand input-output (I/O) pads of a 0.35 /spl mu/m CMOS IC were stressed by ESD (electrostatic discharge) and subsequently subjected to bakes, ESD re-stress and high temperature operating life tests. While the ESD-induced soft drain junction damage appears to be stable versus temperature stress and ESD re-stress, it results in early failures during accelerated operating life tests. These life test failures are caused by breakdown of the gate oxide which was left unbroken during the ESD stress that caused the ESD-induced soft drain junction damage. Thus, ESD-induced soft drain junction damage might cause a reliability risk (latent ESD failure). Consequently, it needs to be avoided by assuring sufficient robustness of the IC against this ESD damage mechanism. A leakage current criterion of 1 /spl mu/A is rather large to detect this kind of damage after ESD stress. |
doi_str_mv | 10.1109/IPFA.2001.941459 |
format | Conference Proceeding |
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Several thousand input-output (I/O) pads of a 0.35 /spl mu/m CMOS IC were stressed by ESD (electrostatic discharge) and subsequently subjected to bakes, ESD re-stress and high temperature operating life tests. While the ESD-induced soft drain junction damage appears to be stable versus temperature stress and ESD re-stress, it results in early failures during accelerated operating life tests. These life test failures are caused by breakdown of the gate oxide which was left unbroken during the ESD stress that caused the ESD-induced soft drain junction damage. Thus, ESD-induced soft drain junction damage might cause a reliability risk (latent ESD failure). Consequently, it needs to be avoided by assuring sufficient robustness of the IC against this ESD damage mechanism. A leakage current criterion of 1 /spl mu/A is rather large to detect this kind of damage after ESD stress.</description><identifier>ISBN: 0780366751</identifier><identifier>ISBN: 9780780366756</identifier><identifier>DOI: 10.1109/IPFA.2001.941459</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS integrated circuits ; Electric breakdown ; Electrostatic discharge ; Integrated circuit testing ; Leakage current ; Life estimation ; Life testing ; Robustness ; Stress ; Temperature</subject><ispartof>Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. 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No.01TH8548)</title><addtitle>IPFA</addtitle><description>The impact of ESD-induced soft drain junction damage on product lifetime was investigated. Several thousand input-output (I/O) pads of a 0.35 /spl mu/m CMOS IC were stressed by ESD (electrostatic discharge) and subsequently subjected to bakes, ESD re-stress and high temperature operating life tests. While the ESD-induced soft drain junction damage appears to be stable versus temperature stress and ESD re-stress, it results in early failures during accelerated operating life tests. These life test failures are caused by breakdown of the gate oxide which was left unbroken during the ESD stress that caused the ESD-induced soft drain junction damage. Thus, ESD-induced soft drain junction damage might cause a reliability risk (latent ESD failure). Consequently, it needs to be avoided by assuring sufficient robustness of the IC against this ESD damage mechanism. A leakage current criterion of 1 /spl mu/A is rather large to detect this kind of damage after ESD stress.</description><subject>CMOS integrated circuits</subject><subject>Electric breakdown</subject><subject>Electrostatic discharge</subject><subject>Integrated circuit testing</subject><subject>Leakage current</subject><subject>Life estimation</subject><subject>Life testing</subject><subject>Robustness</subject><subject>Stress</subject><subject>Temperature</subject><isbn>0780366751</isbn><isbn>9780780366756</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2001</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj09LAzEUxAMiqLV38ZQvsGve5iW7OZba6kKlQvVcHpsXSen-YTc9-O1dqDOH-R2GgRHiCVQOoNxL_bld5YVSkDsENO5GPKiyUtra0sCdWE7TSc1Cg1gV96Ku24GaJPsgN4fXLHb-0rCXUx-S9CPFTp4uXZNi30lPLf2wnGn9sT_IYeznbpLnGDjFlh_FbaDzxMv_XIjv7eZr_Z7t9m_1erXLIihMGWhyqmBLFDBUgSpjdbA82-iCyKCrSkRWFonZaculNwF8aYGgAFR6IZ6vu5GZj8MYWxp_j9ez-g-Xo0kU</recordid><startdate>2001</startdate><enddate>2001</enddate><creator>Reiner, J.C.</creator><creator>Keller, T.</creator><creator>Jaggi, H.</creator><creator>Mira, S.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2001</creationdate><title>Impact of ESD-induced soft drain junction damage on CMOS product lifetime</title><author>Reiner, J.C. ; Keller, T. ; Jaggi, H. ; Mira, S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i104t-13a902e6aaf4f8fa8563f6e6e6532aa5498744e064aee936e7d5f1d761a121403</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2001</creationdate><topic>CMOS integrated circuits</topic><topic>Electric breakdown</topic><topic>Electrostatic discharge</topic><topic>Integrated circuit testing</topic><topic>Leakage current</topic><topic>Life estimation</topic><topic>Life testing</topic><topic>Robustness</topic><topic>Stress</topic><topic>Temperature</topic><toplevel>online_resources</toplevel><creatorcontrib>Reiner, J.C.</creatorcontrib><creatorcontrib>Keller, T.</creatorcontrib><creatorcontrib>Jaggi, H.</creatorcontrib><creatorcontrib>Mira, S.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Reiner, J.C.</au><au>Keller, T.</au><au>Jaggi, H.</au><au>Mira, S.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Impact of ESD-induced soft drain junction damage on CMOS product lifetime</atitle><btitle>Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548)</btitle><stitle>IPFA</stitle><date>2001</date><risdate>2001</risdate><spage>77</spage><epage>78</epage><pages>77-78</pages><isbn>0780366751</isbn><isbn>9780780366756</isbn><abstract>The impact of ESD-induced soft drain junction damage on product lifetime was investigated. Several thousand input-output (I/O) pads of a 0.35 /spl mu/m CMOS IC were stressed by ESD (electrostatic discharge) and subsequently subjected to bakes, ESD re-stress and high temperature operating life tests. While the ESD-induced soft drain junction damage appears to be stable versus temperature stress and ESD re-stress, it results in early failures during accelerated operating life tests. These life test failures are caused by breakdown of the gate oxide which was left unbroken during the ESD stress that caused the ESD-induced soft drain junction damage. Thus, ESD-induced soft drain junction damage might cause a reliability risk (latent ESD failure). Consequently, it needs to be avoided by assuring sufficient robustness of the IC against this ESD damage mechanism. A leakage current criterion of 1 /spl mu/A is rather large to detect this kind of damage after ESD stress.</abstract><pub>IEEE</pub><doi>10.1109/IPFA.2001.941459</doi><tpages>2</tpages></addata></record> |
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language | eng |
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subjects | CMOS integrated circuits Electric breakdown Electrostatic discharge Integrated circuit testing Leakage current Life estimation Life testing Robustness Stress Temperature |
title | Impact of ESD-induced soft drain junction damage on CMOS product lifetime |
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