A JTAG based AC leakage self-test
For the last decade, the manufacturing cost per transistor has been exponentially decreasing. The test cost, however, has been decreasing at a much slower rate and now occupies a significant portion of the total cost of a microprocessor. To address this problem, many companies have planned to gradua...
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| creator | Rahal-Arabi, T. Taylor, G. |
| description | For the last decade, the manufacturing cost per transistor has been exponentially decreasing. The test cost, however, has been decreasing at a much slower rate and now occupies a significant portion of the total cost of a microprocessor. To address this problem, many companies have planned to gradually move away from functional testing to less expensive structural and system level testing. The fundamental cost difference between these techniques comes from a reduction in the number of pins directly driven by the tester. This work describes a new technique that allows a tester to determine if all of the pins on a chip have acceptable leakage without requiring the tester to actually contact each individual pin. |
| doi_str_mv | 10.1109/VLSIC.2001.934239 |
| format | Conference Proceeding |
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This work describes a new technique that allows a tester to determine if all of the pins on a chip have acceptable leakage without requiring the tester to actually contact each individual pin.</description><subject>Automatic testing</subject><subject>Costs</subject><subject>Current measurement</subject><subject>Leakage current</subject><subject>Logic</subject><subject>Manufacturing</subject><subject>Pins</subject><subject>Sampling methods</subject><subject>System testing</subject><subject>Voltage</subject><isbn>9784891140144</isbn><isbn>4891140143</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2001</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tKxEAQAAdEUNZ8gJ7GD0jsTneS6WMIuq4EPLh6XebRkWgE2cnFv1dY61K3gjLmGqFCBLl7G192Q1UDYCXENcmZKaRz7ASRAZkvTJHzB_zBTOLo0tz29mnfb23wWZPtB7uo__TvarMuU7lqXq_M-eSXrMW_N-b14X4_PJbj83Y39GM5I_Baus7BFBJ5rgPH6ABVAyaYHDEANaHp2thiwDo5dOraRoQ9JEhROolEG3Nz6s6qevg-zl_--HM4fdAvlJg6iA</recordid><startdate>2001</startdate><enddate>2001</enddate><creator>Rahal-Arabi, T.</creator><creator>Taylor, G.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2001</creationdate><title>A JTAG based AC leakage self-test</title><author>Rahal-Arabi, T. ; Taylor, G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i104t-8780fbd3a42b4cc801eeb1d0f8340035b576c61b12d818e865994a0d0dc979c33</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Automatic testing</topic><topic>Costs</topic><topic>Current measurement</topic><topic>Leakage current</topic><topic>Logic</topic><topic>Manufacturing</topic><topic>Pins</topic><topic>Sampling methods</topic><topic>System testing</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Rahal-Arabi, T.</creatorcontrib><creatorcontrib>Taylor, G.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rahal-Arabi, T.</au><au>Taylor, G.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A JTAG based AC leakage self-test</atitle><btitle>2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)</btitle><stitle>VLSIC</stitle><date>2001</date><risdate>2001</risdate><spage>205</spage><epage>206</epage><pages>205-206</pages><isbn>9784891140144</isbn><isbn>4891140143</isbn><abstract>For the last decade, the manufacturing cost per transistor has been exponentially decreasing. The test cost, however, has been decreasing at a much slower rate and now occupies a significant portion of the total cost of a microprocessor. To address this problem, many companies have planned to gradually move away from functional testing to less expensive structural and system level testing. The fundamental cost difference between these techniques comes from a reduction in the number of pins directly driven by the tester. This work describes a new technique that allows a tester to determine if all of the pins on a chip have acceptable leakage without requiring the tester to actually contact each individual pin.</abstract><pub>IEEE</pub><doi>10.1109/VLSIC.2001.934239</doi><tpages>2</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 9784891140144 |
| ispartof | 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185), 2001, p.205-206 |
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| language | eng |
| recordid | cdi_ieee_primary_934239 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Automatic testing Costs Current measurement Leakage current Logic Manufacturing Pins Sampling methods System testing Voltage |
| title | A JTAG based AC leakage self-test |
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