Surround Gate Transistor With Epitaxially Grown Si Pillar and Simulation Study on Soft Error and Rowhammer Tolerance for DRAM

A new dynamic random access memory (DRAM) memory cell transistor is fabricated, and its soft-error immunity and rowhammer tolerance are studied. The vertical channel is formed by selective epitaxial growth of silicon pillar, and the surround gate forms a fully depleted (FD) channel, which can suppre...

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Veröffentlicht in:IEEE transactions on electron devices 2021-02, Vol.68 (2), p.529-534
Hauptverfasser: Han, Jin-Woo, Kim, Jungsik, Beery, Dafna, Bozdag, K. Deniz, Cuevas, Peter, Levi, Amitay, Tain, Irwin, Tran, Khai, Walker, Andrew J., Palayam, Senthil Vadakupudhu, Arreghini, Antonio, Furnemont, Arnaud, Meyyappan, M.
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Sprache:eng
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