Defect and electromigration characterization of a two level copper interconnect

The effect of annealing conditions on defects and post CMP grain size in electroplated Cu lines is discussed. We have studied the effect of these parameters on interconnect reliability by measuring the electromigration of 'via-fed' structures. A failure criterion of 2% change in initial re...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Parikh, S., Educato, J., Wang, A., Zheng, B., Wijekoon, K., Chen, J., Rana, V., Cheung, R., Dixit, G.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 185
container_issue
container_start_page 183
container_title
container_volume
creator Parikh, S.
Educato, J.
Wang, A.
Zheng, B.
Wijekoon, K.
Chen, J.
Rana, V.
Cheung, R.
Dixit, G.
description The effect of annealing conditions on defects and post CMP grain size in electroplated Cu lines is discussed. We have studied the effect of these parameters on interconnect reliability by measuring the electromigration of 'via-fed' structures. A failure criterion of 2% change in initial resistance was used for EM rather than the traditional 20% used for aluminum interconnect. The electromigration behavior of furnace annealed films is compared to rapid thermal annealed films and the activation energy is found to be in the range of 0.9 to 1.0 eV.
doi_str_mv 10.1109/IITC.2001.930054
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_930054</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>930054</ieee_id><sourcerecordid>930054</sourcerecordid><originalsourceid>FETCH-LOGICAL-i104t-12a3f23e84ebbe27ac954ce9ff25158b0d150d37dca752aae61d2d5fb215ce663</originalsourceid><addsrcrecordid>eNotT01LxDAUDIigrL2Lp_yB1nynPUr9KizsZT0vr8mLRrpNSYuiv95CHQZmGN4bGEJuOas4Z8191x3bSjDGq0YyptUFKRpbs5XSGFvbK1LM8ydbobSShl-TwyMGdAuF0VMcVpfTOb5nWGIaqfuADG7BHH-3IAUKdPlOdMAvHKhL04SZxnE9cWkc1_cbchlgmLH41x15e346tq_l_vDStQ_7MnKmlpILkEFIrBX2PQoLrtHKYROC0FzXPfNcMy-td2C1AEDDvfA69IJrh8bIHbnbeiMinqYcz5B_Tttq-QfFSU64</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Defect and electromigration characterization of a two level copper interconnect</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Parikh, S. ; Educato, J. ; Wang, A. ; Zheng, B. ; Wijekoon, K. ; Chen, J. ; Rana, V. ; Cheung, R. ; Dixit, G.</creator><creatorcontrib>Parikh, S. ; Educato, J. ; Wang, A. ; Zheng, B. ; Wijekoon, K. ; Chen, J. ; Rana, V. ; Cheung, R. ; Dixit, G.</creatorcontrib><description>The effect of annealing conditions on defects and post CMP grain size in electroplated Cu lines is discussed. We have studied the effect of these parameters on interconnect reliability by measuring the electromigration of 'via-fed' structures. A failure criterion of 2% change in initial resistance was used for EM rather than the traditional 20% used for aluminum interconnect. The electromigration behavior of furnace annealed films is compared to rapid thermal annealed films and the activation energy is found to be in the range of 0.9 to 1.0 eV.</description><identifier>ISBN: 9780780366787</identifier><identifier>ISBN: 0780366786</identifier><identifier>DOI: 10.1109/IITC.2001.930054</identifier><language>eng</language><publisher>IEEE</publisher><subject>Annealing ; Artificial intelligence ; Copper ; Corrosion ; Dielectrics ; Electromigration ; Etching ; Furnaces ; Passivation ; Silicon compounds</subject><ispartof>Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461), 2001, p.183-185</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/930054$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/930054$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Parikh, S.</creatorcontrib><creatorcontrib>Educato, J.</creatorcontrib><creatorcontrib>Wang, A.</creatorcontrib><creatorcontrib>Zheng, B.</creatorcontrib><creatorcontrib>Wijekoon, K.</creatorcontrib><creatorcontrib>Chen, J.</creatorcontrib><creatorcontrib>Rana, V.</creatorcontrib><creatorcontrib>Cheung, R.</creatorcontrib><creatorcontrib>Dixit, G.</creatorcontrib><title>Defect and electromigration characterization of a two level copper interconnect</title><title>Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461)</title><addtitle>IITC</addtitle><description>The effect of annealing conditions on defects and post CMP grain size in electroplated Cu lines is discussed. We have studied the effect of these parameters on interconnect reliability by measuring the electromigration of 'via-fed' structures. A failure criterion of 2% change in initial resistance was used for EM rather than the traditional 20% used for aluminum interconnect. The electromigration behavior of furnace annealed films is compared to rapid thermal annealed films and the activation energy is found to be in the range of 0.9 to 1.0 eV.</description><subject>Annealing</subject><subject>Artificial intelligence</subject><subject>Copper</subject><subject>Corrosion</subject><subject>Dielectrics</subject><subject>Electromigration</subject><subject>Etching</subject><subject>Furnaces</subject><subject>Passivation</subject><subject>Silicon compounds</subject><isbn>9780780366787</isbn><isbn>0780366786</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2001</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotT01LxDAUDIigrL2Lp_yB1nynPUr9KizsZT0vr8mLRrpNSYuiv95CHQZmGN4bGEJuOas4Z8191x3bSjDGq0YyptUFKRpbs5XSGFvbK1LM8ydbobSShl-TwyMGdAuF0VMcVpfTOb5nWGIaqfuADG7BHH-3IAUKdPlOdMAvHKhL04SZxnE9cWkc1_cbchlgmLH41x15e346tq_l_vDStQ_7MnKmlpILkEFIrBX2PQoLrtHKYROC0FzXPfNcMy-td2C1AEDDvfA69IJrh8bIHbnbeiMinqYcz5B_Tttq-QfFSU64</recordid><startdate>2001</startdate><enddate>2001</enddate><creator>Parikh, S.</creator><creator>Educato, J.</creator><creator>Wang, A.</creator><creator>Zheng, B.</creator><creator>Wijekoon, K.</creator><creator>Chen, J.</creator><creator>Rana, V.</creator><creator>Cheung, R.</creator><creator>Dixit, G.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2001</creationdate><title>Defect and electromigration characterization of a two level copper interconnect</title><author>Parikh, S. ; Educato, J. ; Wang, A. ; Zheng, B. ; Wijekoon, K. ; Chen, J. ; Rana, V. ; Cheung, R. ; Dixit, G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i104t-12a3f23e84ebbe27ac954ce9ff25158b0d150d37dca752aae61d2d5fb215ce663</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Annealing</topic><topic>Artificial intelligence</topic><topic>Copper</topic><topic>Corrosion</topic><topic>Dielectrics</topic><topic>Electromigration</topic><topic>Etching</topic><topic>Furnaces</topic><topic>Passivation</topic><topic>Silicon compounds</topic><toplevel>online_resources</toplevel><creatorcontrib>Parikh, S.</creatorcontrib><creatorcontrib>Educato, J.</creatorcontrib><creatorcontrib>Wang, A.</creatorcontrib><creatorcontrib>Zheng, B.</creatorcontrib><creatorcontrib>Wijekoon, K.</creatorcontrib><creatorcontrib>Chen, J.</creatorcontrib><creatorcontrib>Rana, V.</creatorcontrib><creatorcontrib>Cheung, R.</creatorcontrib><creatorcontrib>Dixit, G.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Parikh, S.</au><au>Educato, J.</au><au>Wang, A.</au><au>Zheng, B.</au><au>Wijekoon, K.</au><au>Chen, J.</au><au>Rana, V.</au><au>Cheung, R.</au><au>Dixit, G.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Defect and electromigration characterization of a two level copper interconnect</atitle><btitle>Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461)</btitle><stitle>IITC</stitle><date>2001</date><risdate>2001</risdate><spage>183</spage><epage>185</epage><pages>183-185</pages><isbn>9780780366787</isbn><isbn>0780366786</isbn><abstract>The effect of annealing conditions on defects and post CMP grain size in electroplated Cu lines is discussed. We have studied the effect of these parameters on interconnect reliability by measuring the electromigration of 'via-fed' structures. A failure criterion of 2% change in initial resistance was used for EM rather than the traditional 20% used for aluminum interconnect. The electromigration behavior of furnace annealed films is compared to rapid thermal annealed films and the activation energy is found to be in the range of 0.9 to 1.0 eV.</abstract><pub>IEEE</pub><doi>10.1109/IITC.2001.930054</doi><tpages>3</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISBN: 9780780366787
ispartof Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461), 2001, p.183-185
issn
language eng
recordid cdi_ieee_primary_930054
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Annealing
Artificial intelligence
Copper
Corrosion
Dielectrics
Electromigration
Etching
Furnaces
Passivation
Silicon compounds
title Defect and electromigration characterization of a two level copper interconnect
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T03%3A31%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Defect%20and%20electromigration%20characterization%20of%20a%20two%20level%20copper%20interconnect&rft.btitle=Proceedings%20of%20the%20IEEE%202001%20International%20Interconnect%20Technology%20Conference%20(Cat.%20No.01EX461)&rft.au=Parikh,%20S.&rft.date=2001&rft.spage=183&rft.epage=185&rft.pages=183-185&rft.isbn=9780780366787&rft.isbn_list=0780366786&rft_id=info:doi/10.1109/IITC.2001.930054&rft_dat=%3Cieee_6IE%3E930054%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=930054&rfr_iscdi=true