A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS

This paper reports a half-rate bang-bang clock and data recovery (BBCDR) circuit supporting the trimodal (NRZ/PAM-4/PAM-8) operation. The observation of their crossover- points distribution at the transitions introduces the single-loop phase tracking technique. In addition, low-power techniques at b...

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Veröffentlicht in:	IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2021-01, Vol.68 (1), p.89-102
Hauptverfasser:	Zhao, Xiaoteng, Chen, Yong, Mak, Pui-In, Martins, Rui P.
Format:	Artikel
Sprache:	eng
Schlagworte:	bang- bang clock and data recovery (BBCDR) bang-bang phase detector (BBPD) Circuits Clock recovery Clocks CMOS Crossovers Data recovery Decoding four- and eight-level pulse amplitude modulation (PAM-4/-8) half rate Hardware Hogge and Alexander PD Jitter jitter tolerance (JTOL) jitter transfer function (JTF) non-return-to-zero (NRZ) Optical signal processing StrongARM comparator Timing Tracking loops Vibration
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