Optimal Accelerated Test Framework for Time-Dependent Dielectric Breakdown Lifetime Parameter Estimation

A framework is presented to identify an optimal accelerated test region and accelerated test conditions for the accelerated test of logic circuits for time-dependent dielectric breakdown (TDDB). Both gate-oxide breakdown and middle-of-line (MOL) TDDB are investigated. Separate test regions are ident...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2020-12, Vol.28 (12), p.2658-2671
Hauptverfasser:	Wu, Yi-Da, Yang, Kexin, Hsu, Shu-Han, Milor, Linda
Format:	Artikel
Sprache:	eng
Schlagworte:	Accelerated test Accelerated tests design of experiments Dielectric breakdown digital circuit Digital electronics Electric breakdown Errors Estimation Fast Fourier transformations Feature extraction Forecasting Fourier transforms gate-oxide breakdown Integrated circuit modeling Integrated circuit reliability Life estimation Lifetime lifetime simulator Logic circuits Logic gates microprocessor middle-of-line (MOL) time-dependent breakdown Parameter estimation Parameter identification Process parameters reliability Time dependence time-dependent dielectric breakdown (TDDB) wearout Weibull distribution
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