An embedded DRAM hybrid macro with auto signal management and enhanced-on-chip tester

Embedded DRAM (eDRAM) macros have been proposed as away to achieve the low power and wide bandwidth required by graphic controllers, network systems, and mobile systems. Currently, these applications require a reduction of design turn-around time (TAT) for the various specifications, as well as lowe...

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Veröffentlicht in:	2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) 2001, p.388-389
Hauptverfasser:	Watanabe, N., Morishita, F., Taito, Y., Yamazaki, A., Tanizaki, T., Dosaka, K., Morooka, Y., Igaue, F., Furue, K., Nagura, Y., Komoike, T., Morihara, T., Hachisuka, A., Arimoto, K., Ozaki, H.
Format:	Artikel
Sprache:	eng
Schlagworte:	Bandwidth Circuit testing Computer architecture Control systems Delay Graphics Hardware design languages Performance evaluation Power system management Random access memory
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