CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

This paper describes a low-voltage low-jitter clock synthesizer and a temperature-compensated tunable oscillator. Both of these circuits employ a self-correcting delay-locked loop (DLL) which solves the problem of false locking associated with conventional DLLs. This DLL does not require the delay c...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2001-03, Vol.36 (3), p.417-423
Hauptverfasser:	Foley, D.J., Flynn, M.P.
Format:	Artikel
Sprache:	eng
Schlagworte:	Circuits Clocks CMOS Delay Dynamic link libraries Filters Frequency synthesizers Integrated circuit measurements Jitter Oscillators Phase locked loops Synthesizers Tunable circuits and devices Voltage control Voltage-controlled oscillators
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