Searching for Bugs Using Probabilistic Suspect Implications

Due to the excessive cost associated with manual RTL design debugging, automated tools are often employed to identify a set of suspect bug locations. To further accelerate the process, one observes that the anytime behavior of these tools allows partial results to be analyzed before the suspect sear...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2020-12, Vol.39 (12), p.5267-5280
Hauptverfasser:	Veira, Neil, Poulos, Zissis, Veneris, Andreas
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Computer bugs Debugging Empirical analysis Neural networks Prediction algorithms Prediction models Probabilistic logic RTL suspect implications Task analysis verification Very large scale integration very large-scale integration (VLSI)
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