Degradation Behavior and Mechanisms of E-Mode GaN HEMTs With p-GaN Gate Under Reverse Electrostatic Discharge Stress
The degradation behavior and its mechanisms of E-mode GaN high electron mobility transistors (HEMTs) with p-GaN gate under electrostatic discharge (ESD) stress were investigated. Reverse short-pulse stress was generated by a transmission line pulse (TLP) tester in order to simulate the static electr...
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Veröffentlicht in: | IEEE transactions on electron devices 2020-02, Vol.67 (2), p.566-570 |
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container_title | IEEE transactions on electron devices |
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description | The degradation behavior and its mechanisms of E-mode GaN high electron mobility transistors (HEMTs) with p-GaN gate under electrostatic discharge (ESD) stress were investigated. Reverse short-pulse stress was generated by a transmission line pulse (TLP) tester in order to simulate the static electricity. The experiment results show that the reverse short-pulse stress leads to the characteristic degradation of the E-mode GaN HEMTs with p-GaN gate. The values of the threshold voltage and ON-resistance increase, and the gate capacitance curve shifts positively. The low-frequency noises (LFNs) were obtained for the E-mode GaN HEMTs with p-GaN gate before and after the reverse short-pulse stress. The concentration of traps was extracted, and it has doubled after 700 cycles. The degradation mechanism could be attributed to the generation of traps at p-GaN/AlGaN heterointerface, AlGaN barrier, and GaN/AlGaN interface. Such an investigation can be a significant reference in the design and application of E-mode GaN power devices. |
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Q. ; Feng, J. T. ; Wang, J. L. ; Xu, X. B. ; He, Z. Y. ; Li, G. Y. ; Lei, D. Y. ; Chen, Y. ; Huang, Y.</creator><creatorcontrib>Chen, Y. Q. ; Feng, J. T. ; Wang, J. L. ; Xu, X. B. ; He, Z. Y. ; Li, G. Y. ; Lei, D. Y. ; Chen, Y. ; Huang, Y.</creatorcontrib><description>The degradation behavior and its mechanisms of E-mode GaN high electron mobility transistors (HEMTs) with p-GaN gate under electrostatic discharge (ESD) stress were investigated. Reverse short-pulse stress was generated by a transmission line pulse (TLP) tester in order to simulate the static electricity. The experiment results show that the reverse short-pulse stress leads to the characteristic degradation of the E-mode GaN HEMTs with p-GaN gate. The values of the threshold voltage and ON-resistance increase, and the gate capacitance curve shifts positively. The low-frequency noises (LFNs) were obtained for the E-mode GaN HEMTs with p-GaN gate before and after the reverse short-pulse stress. The concentration of traps was extracted, and it has doubled after 700 cycles. The degradation mechanism could be attributed to the generation of traps at p-GaN/AlGaN heterointerface, AlGaN barrier, and GaN/AlGaN interface. Such an investigation can be a significant reference in the design and application of E-mode GaN power devices.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2019.2959299</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Aluminum gallium nitride ; Aluminum gallium nitrides ; Degradation ; Electron mobility ; Electronic devices ; Electrostatic discharge (ESD) ; Electrostatic discharges ; Gallium nitride ; HEMTs ; high electron mobility transistor (HEMT) ; High electron mobility transistors ; Logic gates ; low-frequency noise (LFN) ; MODFETs ; p-GaN ; Semiconductor devices ; Static electricity ; Stress ; Stress concentration ; Threshold voltage ; Transmission lines ; trap</subject><ispartof>IEEE transactions on electron devices, 2020-02, Vol.67 (2), p.566-570</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-e224fd3dd04da4eb85478b1631f3f491a26633e65a4b4bc81c60ca55051984fd3</citedby><cites>FETCH-LOGICAL-c291t-e224fd3dd04da4eb85478b1631f3f491a26633e65a4b4bc81c60ca55051984fd3</cites><orcidid>0000-0001-6901-3000 ; 0000-0002-9377-5264 ; 0000-0002-0064-3626 ; 0000-0001-8935-649X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8948361$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27905,27906,54739</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8948361$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chen, Y. Q.</creatorcontrib><creatorcontrib>Feng, J. T.</creatorcontrib><creatorcontrib>Wang, J. L.</creatorcontrib><creatorcontrib>Xu, X. B.</creatorcontrib><creatorcontrib>He, Z. Y.</creatorcontrib><creatorcontrib>Li, G. Y.</creatorcontrib><creatorcontrib>Lei, D. Y.</creatorcontrib><creatorcontrib>Chen, Y.</creatorcontrib><creatorcontrib>Huang, Y.</creatorcontrib><title>Degradation Behavior and Mechanisms of E-Mode GaN HEMTs With p-GaN Gate Under Reverse Electrostatic Discharge Stress</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>The degradation behavior and its mechanisms of E-mode GaN high electron mobility transistors (HEMTs) with p-GaN gate under electrostatic discharge (ESD) stress were investigated. Reverse short-pulse stress was generated by a transmission line pulse (TLP) tester in order to simulate the static electricity. The experiment results show that the reverse short-pulse stress leads to the characteristic degradation of the E-mode GaN HEMTs with p-GaN gate. The values of the threshold voltage and ON-resistance increase, and the gate capacitance curve shifts positively. The low-frequency noises (LFNs) were obtained for the E-mode GaN HEMTs with p-GaN gate before and after the reverse short-pulse stress. The concentration of traps was extracted, and it has doubled after 700 cycles. The degradation mechanism could be attributed to the generation of traps at p-GaN/AlGaN heterointerface, AlGaN barrier, and GaN/AlGaN interface. Such an investigation can be a significant reference in the design and application of E-mode GaN power devices.</description><subject>Aluminum gallium nitride</subject><subject>Aluminum gallium nitrides</subject><subject>Degradation</subject><subject>Electron mobility</subject><subject>Electronic devices</subject><subject>Electrostatic discharge (ESD)</subject><subject>Electrostatic discharges</subject><subject>Gallium nitride</subject><subject>HEMTs</subject><subject>high electron mobility transistor (HEMT)</subject><subject>High electron mobility transistors</subject><subject>Logic gates</subject><subject>low-frequency noise (LFN)</subject><subject>MODFETs</subject><subject>p-GaN</subject><subject>Semiconductor devices</subject><subject>Static electricity</subject><subject>Stress</subject><subject>Stress concentration</subject><subject>Threshold voltage</subject><subject>Transmission lines</subject><subject>trap</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kF1PwjAUhhujiYjem3jTxOthv1baS4UJJqCJQrxsuu0MRmDDtpD47-0C8ao5zfs-5-RB6J6SAaVEPy2y8YARqgdMp5ppfYF6NE2HiZZCXqIeIVQlmit-jW6838RRCsF6KIxh5WxpQ902-AXW9li3DtumxHMo1rap_c7jtsJZMm9LwBP7jqfZfOHxdx3WeJ90HxMbAC-bEhz-hCM4DzjbQhFc60MEF3hc-8hyK8BfwYH3t-iqslsPd-e3j5av2WI0TWYfk7fR8ywpmKYhAcZEVfKyJKK0AnKViqHKqeS04pXQ1DIpOQeZWpGLvFC0kKSwaUpSqlXX7KPHE3fv2p8D-GA27cE1caVhPAKoIpTFFDmliniwd1CZvat31v0aSkzn1kS3pnNrzm5j5eFUqQHgP660UFxS_gdjmXP3</recordid><startdate>20200201</startdate><enddate>20200201</enddate><creator>Chen, Y. Q.</creator><creator>Feng, J. T.</creator><creator>Wang, J. L.</creator><creator>Xu, X. B.</creator><creator>He, Z. Y.</creator><creator>Li, G. Y.</creator><creator>Lei, D. Y.</creator><creator>Chen, Y.</creator><creator>Huang, Y.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-6901-3000</orcidid><orcidid>https://orcid.org/0000-0002-9377-5264</orcidid><orcidid>https://orcid.org/0000-0002-0064-3626</orcidid><orcidid>https://orcid.org/0000-0001-8935-649X</orcidid></search><sort><creationdate>20200201</creationdate><title>Degradation Behavior and Mechanisms of E-Mode GaN HEMTs With p-GaN Gate Under Reverse Electrostatic Discharge Stress</title><author>Chen, Y. Q. ; Feng, J. T. ; Wang, J. L. ; Xu, X. B. ; He, Z. Y. ; Li, G. Y. ; Lei, D. Y. ; Chen, Y. ; Huang, Y.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-e224fd3dd04da4eb85478b1631f3f491a26633e65a4b4bc81c60ca55051984fd3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Aluminum gallium nitride</topic><topic>Aluminum gallium nitrides</topic><topic>Degradation</topic><topic>Electron mobility</topic><topic>Electronic devices</topic><topic>Electrostatic discharge (ESD)</topic><topic>Electrostatic discharges</topic><topic>Gallium nitride</topic><topic>HEMTs</topic><topic>high electron mobility transistor (HEMT)</topic><topic>High electron mobility transistors</topic><topic>Logic gates</topic><topic>low-frequency noise (LFN)</topic><topic>MODFETs</topic><topic>p-GaN</topic><topic>Semiconductor devices</topic><topic>Static electricity</topic><topic>Stress</topic><topic>Stress concentration</topic><topic>Threshold voltage</topic><topic>Transmission lines</topic><topic>trap</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chen, Y. Q.</creatorcontrib><creatorcontrib>Feng, J. T.</creatorcontrib><creatorcontrib>Wang, J. L.</creatorcontrib><creatorcontrib>Xu, X. B.</creatorcontrib><creatorcontrib>He, Z. Y.</creatorcontrib><creatorcontrib>Li, G. Y.</creatorcontrib><creatorcontrib>Lei, D. Y.</creatorcontrib><creatorcontrib>Chen, Y.</creatorcontrib><creatorcontrib>Huang, Y.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Y. Q.</au><au>Feng, J. T.</au><au>Wang, J. L.</au><au>Xu, X. B.</au><au>He, Z. Y.</au><au>Li, G. Y.</au><au>Lei, D. Y.</au><au>Chen, Y.</au><au>Huang, Y.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Degradation Behavior and Mechanisms of E-Mode GaN HEMTs With p-GaN Gate Under Reverse Electrostatic Discharge Stress</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2020-02-01</date><risdate>2020</risdate><volume>67</volume><issue>2</issue><spage>566</spage><epage>570</epage><pages>566-570</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The degradation behavior and its mechanisms of E-mode GaN high electron mobility transistors (HEMTs) with p-GaN gate under electrostatic discharge (ESD) stress were investigated. Reverse short-pulse stress was generated by a transmission line pulse (TLP) tester in order to simulate the static electricity. The experiment results show that the reverse short-pulse stress leads to the characteristic degradation of the E-mode GaN HEMTs with p-GaN gate. The values of the threshold voltage and ON-resistance increase, and the gate capacitance curve shifts positively. The low-frequency noises (LFNs) were obtained for the E-mode GaN HEMTs with p-GaN gate before and after the reverse short-pulse stress. The concentration of traps was extracted, and it has doubled after 700 cycles. The degradation mechanism could be attributed to the generation of traps at p-GaN/AlGaN heterointerface, AlGaN barrier, and GaN/AlGaN interface. Such an investigation can be a significant reference in the design and application of E-mode GaN power devices.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2019.2959299</doi><tpages>5</tpages><orcidid>https://orcid.org/0000-0001-6901-3000</orcidid><orcidid>https://orcid.org/0000-0002-9377-5264</orcidid><orcidid>https://orcid.org/0000-0002-0064-3626</orcidid><orcidid>https://orcid.org/0000-0001-8935-649X</orcidid></addata></record> |
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subjects | Aluminum gallium nitride Aluminum gallium nitrides Degradation Electron mobility Electronic devices Electrostatic discharge (ESD) Electrostatic discharges Gallium nitride HEMTs high electron mobility transistor (HEMT) High electron mobility transistors Logic gates low-frequency noise (LFN) MODFETs p-GaN Semiconductor devices Static electricity Stress Stress concentration Threshold voltage Transmission lines trap |
title | Degradation Behavior and Mechanisms of E-Mode GaN HEMTs With p-GaN Gate Under Reverse Electrostatic Discharge Stress |
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