High-Voltage ESD Protection Device With Fast Transient Reaction and High Holding Voltage

A stacked p-n-p(s) and grounded-gate NMOS (ggNMOS) electrostatic discharge (ESD) solution, with higher holding voltage ( {V}_{H} ) and faster transient reaction than a p-n-p-embedded SCR, is proposed for high-voltage (HV) applications. The lowering of the beta gain ( \beta ) of the p-n-p by the use of a deep-N-well (DNW)-based p-n-p in the proposed ESD device is a key to weakening the parasitic SCR action and results in an increase of {V}_{H} . A lower voltage overshoot and fast transient reaction in a charged device model (CDM) event are due to the ggNMOS (parasitic n-p-n). The trigger and ESD shunting mechanisms are determined by the p-n-p(s) in series with the ggNMOS. This is an attractive configuration for achieving an effective, HV ESD device with high {V}_{H} and low-voltage overshoot under CDM conditions.