A semi-formal methodology for the functional validation of an industrial DSP system
This paper describes a new methodology allowing one to increase the efficiency of functional validation. The approach is based on a combination of simulation and formal techniques. It consists of first building formal models of digital hardware modules. The coverage of a test suite can then be accur...
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creator | Arditi, L. Clave, G. |
description | This paper describes a new methodology allowing one to increase the efficiency of functional validation. The approach is based on a combination of simulation and formal techniques. It consists of first building formal models of digital hardware modules. The coverage of a test suite can then be accurately measured and new test cases are automatically generated to increase the coverage. This methodology has been applied during the development of a commercial DSP system. It has shown that, in spite of a very large test suite consisting of 300 million simulation cycles, there was still room for coverage improvement. |
doi_str_mv | 10.1109/ISCAS.2000.858724 |
format | Conference Proceeding |
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The approach is based on a combination of simulation and formal techniques. It consists of first building formal models of digital hardware modules. The coverage of a test suite can then be accurately measured and new test cases are automatically generated to increase the coverage. This methodology has been applied during the development of a commercial DSP system. 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It has shown that, in spite of a very large test suite consisting of 300 million simulation cycles, there was still room for coverage improvement.</description><subject>Automatic testing</subject><subject>Computer bugs</subject><subject>Design engineering</subject><subject>Digital signal processing</subject><subject>Formal languages</subject><subject>Formal verification</subject><subject>Hardware</subject><subject>Instruments</subject><subject>Postal services</subject><subject>Software testing</subject><isbn>9780780354821</isbn><isbn>0780354826</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2000</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj9tKxDAYhAMiKGsfYL3KC7Tm9LfJZamnhQWFutdL2iRupG2kyQp9eysrDAwzHwwMQltKCkqJeti1Td0WjBBSSJAVE1coU5UkqzgIyegNymL8WjkRQBSFW9TWONrR5y7Mox7waNMpmDCEzwWvFU4ni9156pMP04p_9OCN_gs4OKwn7Cdzjmn2K3ts33FcYrLjHbp2eog2-_cNOjw_fTSv-f7tZdfU-9xT4CnnrDLOamOV6pilxrGOGs47VXZOAshOAwjdl067HihhpeEgeyhlRYSiTvANur_semvt8Xv2o56X4-U5_wUaeE-S</recordid><startdate>2000</startdate><enddate>2000</enddate><creator>Arditi, L.</creator><creator>Clave, G.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2000</creationdate><title>A semi-formal methodology for the functional validation of an industrial DSP system</title><author>Arditi, L. ; Clave, G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i153t-327dfeade99b2e1df2b1d33b96bf8558ba554ac6fafc51026d358c56870491f43</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng ; jpn</language><creationdate>2000</creationdate><topic>Automatic testing</topic><topic>Computer bugs</topic><topic>Design engineering</topic><topic>Digital signal processing</topic><topic>Formal languages</topic><topic>Formal verification</topic><topic>Hardware</topic><topic>Instruments</topic><topic>Postal services</topic><topic>Software testing</topic><toplevel>online_resources</toplevel><creatorcontrib>Arditi, L.</creatorcontrib><creatorcontrib>Clave, G.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Arditi, L.</au><au>Clave, G.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A semi-formal methodology for the functional validation of an industrial DSP system</atitle><btitle>2000 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2000</date><risdate>2000</risdate><volume>4</volume><spage>205</spage><epage>208 vol.4</epage><pages>205-208 vol.4</pages><isbn>9780780354821</isbn><isbn>0780354826</isbn><abstract>This paper describes a new methodology allowing one to increase the efficiency of functional validation. The approach is based on a combination of simulation and formal techniques. It consists of first building formal models of digital hardware modules. The coverage of a test suite can then be accurately measured and new test cases are automatically generated to increase the coverage. This methodology has been applied during the development of a commercial DSP system. It has shown that, in spite of a very large test suite consisting of 300 million simulation cycles, there was still room for coverage improvement.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2000.858724</doi></addata></record> |
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subjects | Automatic testing Computer bugs Design engineering Digital signal processing Formal languages Formal verification Hardware Instruments Postal services Software testing |
title | A semi-formal methodology for the functional validation of an industrial DSP system |
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