A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS
Clique-based neural networks implement low-complexity functions working with a reduced connectivity between neurons. Thus, they address very specific applications operating with a very low-energy budget. However, the implementation in the state of the art is not flexible and a fabricated circuit is...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2019-05, Vol.66 (5), p.1704-1715 |
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| container_title | IEEE transactions on circuits and systems. I, Regular papers |
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| creator | Larras, Benoit Chollet, Paul Lahuec, Cyril Seguin, Fabrice Arzel, Matthieu |
| description | Clique-based neural networks implement low-complexity functions working with a reduced connectivity between neurons. Thus, they address very specific applications operating with a very low-energy budget. However, the implementation in the state of the art is not flexible and a fabricated circuit is only usable in a unique use case. Besides, the silicon area of hardwired circuits grows exponentially with the number of implemented neurons that is prohibitive for embedded applications. This paper proposes a flexible and iterative neural architecture capable of implementing multiple types of clique-based neural networks of up to 3968 neurons. The circuit has been integrated in an ST 65-nm CMOS ASIC and occupies a 0.21-mm 2 silicon surface area. The proper functioning of the circuit is illustrated using two application cases: a keyword recovery application and an electrocardiogram classification. The neurons outputs are updated 83 ns after a stimulation, and a neuron needs an energy of 115 fJ to propagate a change at the input to its output. |
| doi_str_mv | 10.1109/TCSI.2018.2881508 |
| format | Article |
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I, Regular papers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Larras, Benoit</au><au>Chollet, Paul</au><au>Lahuec, Cyril</au><au>Seguin, Fabrice</au><au>Arzel, Matthieu</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS</atitle><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle><stitle>TCSI</stitle><date>2019-05-01</date><risdate>2019</risdate><volume>66</volume><issue>5</issue><spage>1704</spage><epage>1715</epage><pages>1704-1715</pages><issn>1549-8328</issn><eissn>1558-0806</eissn><coden>ITCSCH</coden><abstract>Clique-based neural networks implement low-complexity functions working with a reduced connectivity between neurons. Thus, they address very specific applications operating with a very low-energy budget. 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| subjects | analog/mixed-signal circuit Biological neural networks Circuits classification circuit clique-based neural networks CMOS Complexity theory Electrocardiography Energy budget iterative circuit structure Leakage currents Neural networks Neural networks circuit Neurons Silicon Synapses |
| title | A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS |
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