Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments
The identification of threshold function (TF), which determines whether a Boolean function can be represented by an linear threshold logic gate (LTG) or not, is a fundamental but important task in the theories of threshold logic. In this paper, we propose a more efficient and effective algorithm of...
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| Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2019-12, Vol.38 (12), p.2284-2297 |
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| container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
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| creator | Liu, Chin-Heng Lin, Chia-Chun Chen, Yung-Chih Wu, Chia-Cheng Wang, Chun-Yao Yamashita, Shigeru |
| description | The identification of threshold function (TF), which determines whether a Boolean function can be represented by an linear threshold logic gate (LTG) or not, is a fundamental but important task in the theories of threshold logic. In this paper, we propose a more efficient and effective algorithm of TF identification by constructing the system of irredundant inequalities and adjusting the weight assignment comprehensively. This is the first non-ILP-based approach that is able to identify all the eight-input TFs. The experimental results demonstrated that the proposed approach is more effective than all the existing non-ILP-based approaches and the LTGs obtained by the proposed approach are optimal for near 100% cases. For TFs with 9-15 inputs, the proposed approach can identify 100 000 randomly generated TFs as well in a reasonable CPU time. |
| doi_str_mv | 10.1109/TCAD.2018.2878181 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_8509207</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>8509207</ieee_id><sourcerecordid>2316570400</sourcerecordid><originalsourceid>FETCH-LOGICAL-c359t-b629132bade1f941dea65ebdb01c13de2c6d242dbac732af6c6e06163579dc6c3</originalsourceid><addsrcrecordid>eNo9kMFKw0AQhhdRsFYfQLwEPKfO7Cab5Fii1UJBkIoXIWx2J01Ks6nZpNC3N7HF08zA9_8DH2P3CDNESJ7W6fx5xgHjGY-jGGO8YBNMROQHGOIlmwCPYh8ggmt249wWAIOQJxP2vS5bcmWzM96it7qrGustDdmuKiqt_s786H2Q6a1RVo9r3RzUzlPWeGlT71sqybrqQN4XVZuy8-bOVRtbDxXull0Vaufo7jyn7HPxsk7f_NX76zKdr3wtwqTzc8kTFDxXhrBIAjSkZEi5yQE1CkNcS8MDbnKlI8FVIbUkkChFGCVGSy2m7PHUu2-bn55cl22bvrXDy4wLlGEEAcBA4YnSbeNcS0W2b6tatccMIRslZqPEbJSYnSUOmYdTpiKifz4OIeEQiV8-rW8_</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2316570400</pqid></control><display><type>article</type><title>Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments</title><source>IEEE Electronic Library (IEL)</source><creator>Liu, Chin-Heng ; Lin, Chia-Chun ; Chen, Yung-Chih ; Wu, Chia-Cheng ; Wang, Chun-Yao ; Yamashita, Shigeru</creator><creatorcontrib>Liu, Chin-Heng ; Lin, Chia-Chun ; Chen, Yung-Chih ; Wu, Chia-Cheng ; Wang, Chun-Yao ; Yamashita, Shigeru</creatorcontrib><description>The identification of threshold function (TF), which determines whether a Boolean function can be represented by an linear threshold logic gate (LTG) or not, is a fundamental but important task in the theories of threshold logic. In this paper, we propose a more efficient and effective algorithm of TF identification by constructing the system of irredundant inequalities and adjusting the weight assignment comprehensively. This is the first non-ILP-based approach that is able to identify all the eight-input TFs. The experimental results demonstrated that the proposed approach is more effective than all the existing non-ILP-based approaches and the LTGs obtained by the proposed approach are optimal for near 100% cases. For TFs with 9-15 inputs, the proposed approach can identify 100 000 randomly generated TFs as well in a reasonable CPU time.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.2018.2878181</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Algorithms ; Boolean algebra ; Boolean functions ; Input variables ; Linear threshold logic gate (LTG) ; Logic circuits ; Logic gates ; Redundancy ; redundancy removal ; threshold function (TF) identification ; Threshold logic ; Weight ; weight assignments</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 2019-12, Vol.38 (12), p.2284-2297</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c359t-b629132bade1f941dea65ebdb01c13de2c6d242dbac732af6c6e06163579dc6c3</citedby><cites>FETCH-LOGICAL-c359t-b629132bade1f941dea65ebdb01c13de2c6d242dbac732af6c6e06163579dc6c3</cites><orcidid>0000-0002-0136-9825 ; 0000-0002-3934-800X ; 0000-0001-9870-8290 ; 0000-0002-2279-4644</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8509207$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8509207$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Liu, Chin-Heng</creatorcontrib><creatorcontrib>Lin, Chia-Chun</creatorcontrib><creatorcontrib>Chen, Yung-Chih</creatorcontrib><creatorcontrib>Wu, Chia-Cheng</creatorcontrib><creatorcontrib>Wang, Chun-Yao</creatorcontrib><creatorcontrib>Yamashita, Shigeru</creatorcontrib><title>Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>The identification of threshold function (TF), which determines whether a Boolean function can be represented by an linear threshold logic gate (LTG) or not, is a fundamental but important task in the theories of threshold logic. In this paper, we propose a more efficient and effective algorithm of TF identification by constructing the system of irredundant inequalities and adjusting the weight assignment comprehensively. This is the first non-ILP-based approach that is able to identify all the eight-input TFs. The experimental results demonstrated that the proposed approach is more effective than all the existing non-ILP-based approaches and the LTGs obtained by the proposed approach are optimal for near 100% cases. For TFs with 9-15 inputs, the proposed approach can identify 100 000 randomly generated TFs as well in a reasonable CPU time.</description><subject>Algorithms</subject><subject>Boolean algebra</subject><subject>Boolean functions</subject><subject>Input variables</subject><subject>Linear threshold logic gate (LTG)</subject><subject>Logic circuits</subject><subject>Logic gates</subject><subject>Redundancy</subject><subject>redundancy removal</subject><subject>threshold function (TF) identification</subject><subject>Threshold logic</subject><subject>Weight</subject><subject>weight assignments</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kMFKw0AQhhdRsFYfQLwEPKfO7Cab5Fii1UJBkIoXIWx2J01Ks6nZpNC3N7HF08zA9_8DH2P3CDNESJ7W6fx5xgHjGY-jGGO8YBNMROQHGOIlmwCPYh8ggmt249wWAIOQJxP2vS5bcmWzM96it7qrGustDdmuKiqt_s786H2Q6a1RVo9r3RzUzlPWeGlT71sqybrqQN4XVZuy8-bOVRtbDxXull0Vaufo7jyn7HPxsk7f_NX76zKdr3wtwqTzc8kTFDxXhrBIAjSkZEi5yQE1CkNcS8MDbnKlI8FVIbUkkChFGCVGSy2m7PHUu2-bn55cl22bvrXDy4wLlGEEAcBA4YnSbeNcS0W2b6tatccMIRslZqPEbJSYnSUOmYdTpiKifz4OIeEQiV8-rW8_</recordid><startdate>20191201</startdate><enddate>20191201</enddate><creator>Liu, Chin-Heng</creator><creator>Lin, Chia-Chun</creator><creator>Chen, Yung-Chih</creator><creator>Wu, Chia-Cheng</creator><creator>Wang, Chun-Yao</creator><creator>Yamashita, Shigeru</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><orcidid>https://orcid.org/0000-0002-0136-9825</orcidid><orcidid>https://orcid.org/0000-0002-3934-800X</orcidid><orcidid>https://orcid.org/0000-0001-9870-8290</orcidid><orcidid>https://orcid.org/0000-0002-2279-4644</orcidid></search><sort><creationdate>20191201</creationdate><title>Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments</title><author>Liu, Chin-Heng ; Lin, Chia-Chun ; Chen, Yung-Chih ; Wu, Chia-Cheng ; Wang, Chun-Yao ; Yamashita, Shigeru</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c359t-b629132bade1f941dea65ebdb01c13de2c6d242dbac732af6c6e06163579dc6c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>Algorithms</topic><topic>Boolean algebra</topic><topic>Boolean functions</topic><topic>Input variables</topic><topic>Linear threshold logic gate (LTG)</topic><topic>Logic circuits</topic><topic>Logic gates</topic><topic>Redundancy</topic><topic>redundancy removal</topic><topic>threshold function (TF) identification</topic><topic>Threshold logic</topic><topic>Weight</topic><topic>weight assignments</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Liu, Chin-Heng</creatorcontrib><creatorcontrib>Lin, Chia-Chun</creatorcontrib><creatorcontrib>Chen, Yung-Chih</creatorcontrib><creatorcontrib>Wu, Chia-Cheng</creatorcontrib><creatorcontrib>Wang, Chun-Yao</creatorcontrib><creatorcontrib>Yamashita, Shigeru</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Liu, Chin-Heng</au><au>Lin, Chia-Chun</au><au>Chen, Yung-Chih</au><au>Wu, Chia-Cheng</au><au>Wang, Chun-Yao</au><au>Yamashita, Shigeru</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>2019-12-01</date><risdate>2019</risdate><volume>38</volume><issue>12</issue><spage>2284</spage><epage>2297</epage><pages>2284-2297</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>The identification of threshold function (TF), which determines whether a Boolean function can be represented by an linear threshold logic gate (LTG) or not, is a fundamental but important task in the theories of threshold logic. In this paper, we propose a more efficient and effective algorithm of TF identification by constructing the system of irredundant inequalities and adjusting the weight assignment comprehensively. This is the first non-ILP-based approach that is able to identify all the eight-input TFs. The experimental results demonstrated that the proposed approach is more effective than all the existing non-ILP-based approaches and the LTGs obtained by the proposed approach are optimal for near 100% cases. For TFs with 9-15 inputs, the proposed approach can identify 100 000 randomly generated TFs as well in a reasonable CPU time.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCAD.2018.2878181</doi><tpages>14</tpages><orcidid>https://orcid.org/0000-0002-0136-9825</orcidid><orcidid>https://orcid.org/0000-0002-3934-800X</orcidid><orcidid>https://orcid.org/0000-0001-9870-8290</orcidid><orcidid>https://orcid.org/0000-0002-2279-4644</orcidid></addata></record> |
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| identifier | ISSN: 0278-0070 |
| ispartof | IEEE transactions on computer-aided design of integrated circuits and systems, 2019-12, Vol.38 (12), p.2284-2297 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Algorithms Boolean algebra Boolean functions Input variables Linear threshold logic gate (LTG) Logic circuits Logic gates Redundancy redundancy removal threshold function (TF) identification Threshold logic Weight weight assignments |
| title | Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T13%3A30%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Threshold%20Function%20Identification%20by%20Redundancy%20Removal%20and%20Comprehensive%20Weight%20Assignments&rft.jtitle=IEEE%20transactions%20on%20computer-aided%20design%20of%20integrated%20circuits%20and%20systems&rft.au=Liu,%20Chin-Heng&rft.date=2019-12-01&rft.volume=38&rft.issue=12&rft.spage=2284&rft.epage=2297&rft.pages=2284-2297&rft.issn=0278-0070&rft.eissn=1937-4151&rft.coden=ITCSDI&rft_id=info:doi/10.1109/TCAD.2018.2878181&rft_dat=%3Cproquest_RIE%3E2316570400%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2316570400&rft_id=info:pmid/&rft_ieee_id=8509207&rfr_iscdi=true |