Accurate Inductance Modeling of 3-D Inductor Based on TSV
In this letter, an accurate model for the inductance of 3-D integrated inductor based on through silicon via is proposed. The model, considering both the internal inductance and detailed calculation of redistribution layer inductance, can more precisely obtain the total inductance of 3-D inductor us...
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| Veröffentlicht in: | IEEE microwave and wireless components letters 2018-10, Vol.28 (10), p.900-902 |
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| container_title | IEEE microwave and wireless components letters |
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| creator | Gou, Shilong Dong, Gang Mei, Zheng Yang, Yintang |
| description | In this letter, an accurate model for the inductance of 3-D integrated inductor based on through silicon via is proposed. The model, considering both the internal inductance and detailed calculation of redistribution layer inductance, can more precisely obtain the total inductance of 3-D inductor using negligible computational time. Compared with the results of the Q3D extractor, the inductance results obtained from the proposed model exhibit good agreement with various design parameter ranges. The maximum error is less than 3.5%, so our model achieves high accuracy. |
| doi_str_mv | 10.1109/LMWC.2018.2867089 |
| format | Article |
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The model, considering both the internal inductance and detailed calculation of redistribution layer inductance, can more precisely obtain the total inductance of 3-D inductor using negligible computational time. Compared with the results of the Q3D extractor, the inductance results obtained from the proposed model exhibit good agreement with various design parameter ranges. The maximum error is less than 3.5%, so our model achieves high accuracy.</description><identifier>ISSN: 1531-1309</identifier><identifier>ISSN: 2771-957X</identifier><identifier>EISSN: 1558-1764</identifier><identifier>EISSN: 2771-9588</identifier><identifier>DOI: 10.1109/LMWC.2018.2867089</identifier><identifier>CODEN: IMWCBJ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>3-D integrated inductor ; Computational modeling ; Computing time ; Design parameters ; Inductance ; inductance model ; Inductors ; Integrated circuits ; Interconnections ; Model accuracy ; redistribution layers (RDL) ; Silicon ; Solid modeling ; Three dimensional models ; through silicon via (TSV) ; Through-silicon vias ; Wireless communication</subject><ispartof>IEEE microwave and wireless components letters, 2018-10, Vol.28 (10), p.900-902</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-1ba395f21347ff8d50c43c9c6d3f81dc84315564ef6cc421b1a1cf4c77cdaac33</citedby><cites>FETCH-LOGICAL-c293t-1ba395f21347ff8d50c43c9c6d3f81dc84315564ef6cc421b1a1cf4c77cdaac33</cites><orcidid>0000-0001-9745-5404 ; 0000-0001-6557-2286 ; 0000-0002-7797-3041</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8457247$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27905,27906,54739</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8457247$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Gou, Shilong</creatorcontrib><creatorcontrib>Dong, Gang</creatorcontrib><creatorcontrib>Mei, Zheng</creatorcontrib><creatorcontrib>Yang, Yintang</creatorcontrib><title>Accurate Inductance Modeling of 3-D Inductor Based on TSV</title><title>IEEE microwave and wireless components letters</title><addtitle>LMWC</addtitle><description>In this letter, an accurate model for the inductance of 3-D integrated inductor based on through silicon via is proposed. The model, considering both the internal inductance and detailed calculation of redistribution layer inductance, can more precisely obtain the total inductance of 3-D inductor using negligible computational time. Compared with the results of the Q3D extractor, the inductance results obtained from the proposed model exhibit good agreement with various design parameter ranges. The maximum error is less than 3.5%, so our model achieves high accuracy.</description><subject>3-D integrated inductor</subject><subject>Computational modeling</subject><subject>Computing time</subject><subject>Design parameters</subject><subject>Inductance</subject><subject>inductance model</subject><subject>Inductors</subject><subject>Integrated circuits</subject><subject>Interconnections</subject><subject>Model accuracy</subject><subject>redistribution layers (RDL)</subject><subject>Silicon</subject><subject>Solid modeling</subject><subject>Three dimensional models</subject><subject>through silicon via (TSV)</subject><subject>Through-silicon vias</subject><subject>Wireless communication</subject><issn>1531-1309</issn><issn>2771-957X</issn><issn>1558-1764</issn><issn>2771-9588</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1LAzEQhoMoWKs_QLwEPG_NJNlNcqz1q9DiwarHkM4m0lI3Ndk9-O_dpcXTDMzzzgwPIdfAJgDM3C2Wn7MJZ6AnXFeKaXNCRlCWugBVydOhF1CAYOacXOS8ZQykljAiZorYJdd6Om_qDlvXoKfLWPvdpvmiMVBRPBxHMdF7l31NY0NXbx-X5Cy4XfZXxzom70-Pq9lLsXh9ns-miwK5EW0BaydMGTgIqULQdclQCjRY1SJoqFFL0f9ZSR8qRMlhDQ4wSFQKa-dQiDG5Pezdp_jT-dzabexS05-0HECBVkaonoIDhSnmnHyw-7T5dunXArODITsYsoMhezTUZ24OmY33_p_XslRcKvEHC-lf7w</recordid><startdate>20181001</startdate><enddate>20181001</enddate><creator>Gou, Shilong</creator><creator>Dong, Gang</creator><creator>Mei, Zheng</creator><creator>Yang, Yintang</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-9745-5404</orcidid><orcidid>https://orcid.org/0000-0001-6557-2286</orcidid><orcidid>https://orcid.org/0000-0002-7797-3041</orcidid></search><sort><creationdate>20181001</creationdate><title>Accurate Inductance Modeling of 3-D Inductor Based on TSV</title><author>Gou, Shilong ; Dong, Gang ; Mei, Zheng ; Yang, Yintang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c293t-1ba395f21347ff8d50c43c9c6d3f81dc84315564ef6cc421b1a1cf4c77cdaac33</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>3-D integrated inductor</topic><topic>Computational modeling</topic><topic>Computing time</topic><topic>Design parameters</topic><topic>Inductance</topic><topic>inductance model</topic><topic>Inductors</topic><topic>Integrated circuits</topic><topic>Interconnections</topic><topic>Model accuracy</topic><topic>redistribution layers (RDL)</topic><topic>Silicon</topic><topic>Solid modeling</topic><topic>Three dimensional models</topic><topic>through silicon via (TSV)</topic><topic>Through-silicon vias</topic><topic>Wireless communication</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Gou, Shilong</creatorcontrib><creatorcontrib>Dong, Gang</creatorcontrib><creatorcontrib>Mei, Zheng</creatorcontrib><creatorcontrib>Yang, Yintang</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE microwave and wireless components letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gou, Shilong</au><au>Dong, Gang</au><au>Mei, Zheng</au><au>Yang, Yintang</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Accurate Inductance Modeling of 3-D Inductor Based on TSV</atitle><jtitle>IEEE microwave and wireless components letters</jtitle><stitle>LMWC</stitle><date>2018-10-01</date><risdate>2018</risdate><volume>28</volume><issue>10</issue><spage>900</spage><epage>902</epage><pages>900-902</pages><issn>1531-1309</issn><issn>2771-957X</issn><eissn>1558-1764</eissn><eissn>2771-9588</eissn><coden>IMWCBJ</coden><abstract>In this letter, an accurate model for the inductance of 3-D integrated inductor based on through silicon via is proposed. The model, considering both the internal inductance and detailed calculation of redistribution layer inductance, can more precisely obtain the total inductance of 3-D inductor using negligible computational time. Compared with the results of the Q3D extractor, the inductance results obtained from the proposed model exhibit good agreement with various design parameter ranges. The maximum error is less than 3.5%, so our model achieves high accuracy.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LMWC.2018.2867089</doi><tpages>3</tpages><orcidid>https://orcid.org/0000-0001-9745-5404</orcidid><orcidid>https://orcid.org/0000-0001-6557-2286</orcidid><orcidid>https://orcid.org/0000-0002-7797-3041</orcidid></addata></record> |
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| source | IEEE Electronic Library (IEL) |
| subjects | 3-D integrated inductor Computational modeling Computing time Design parameters Inductance inductance model Inductors Integrated circuits Interconnections Model accuracy redistribution layers (RDL) Silicon Solid modeling Three dimensional models through silicon via (TSV) Through-silicon vias Wireless communication |
| title | Accurate Inductance Modeling of 3-D Inductor Based on TSV |
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