Novel capacitor process using diffusion barrier rounded by Si3N4 spacer for high density FRAM device

A novel capacitor process was successfully implemented in 4 Mb FRAM device by developing a barrier layer rounded by Si 3 N 4 spacer (BRS) scheme. Using this process, it is possible to eliminate an undesired barrier etching damage, which is a major role in degrading ferroelectric properties. The nove...

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Veröffentlicht in:	IEEE electron device letters 2000-06, Vol.21 (6), p.280-282
Hauptverfasser:	Bon Jae Koo, Yoon Jong Song, Sung Yung Lee, Dong Jin Jung, Hyun Ho Kim, Suk Ho Joo, Yong Tak Lee, Kinam Kim
Format:	Artikel
Sprache:	eng
Schlagworte:	Capacitors Contact resistance Degradation Etching Ferroelectric films Ferroelectric materials Nonvolatile memory Random access memory Semiconductor films Thermal stresses
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