760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects
The G6 system is a sixth generation CMOS server for the S/390 line of products featuring a 12+2 SMP size and significant frequency improvements obtained through the use of low-Vt devices and copper interconnects. The microprocessor operates at 760 MHz at the fast end of the process distribution. The...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , , , , , , , , , , , , , , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 97 |
|---|---|
| container_issue | |
| container_start_page | 96 |
| container_title | |
| container_volume | |
| creator | McPherson, T. Averill, R. Balazich, D. Barkley, K. Carey, S. Chan, Y. Chan, Y.H. Crea, R. Dansky, A. Dwyer, R. Haen, A. Hoffman, D. Jatkowski, A. Mayo, M. Merrill, D. McNamara, T. Northrop, G. Rawlins, J. Sigal, L. Slegel, T. Webber, D. Williams, P. Yee, F. |
| description | The G6 system is a sixth generation CMOS server for the S/390 line of products featuring a 12+2 SMP size and significant frequency improvements obtained through the use of low-Vt devices and copper interconnects. The microprocessor operates at 760 MHz at the fast end of the process distribution. The system ships at 637 MHz in a 12+2 chilled SMP configuration. Measured system performance on the 12 way is 1600 S/390 MIPs, providing over 50% more performance than the G5. This microprocessor uses CMOS7S technology, which has a 0.2 /spl mu/m process. The chip uses 6 levels of copper metal plus an additional layer of local interconnect on a 14.6/spl times/14.7 mm/sup 2/ die with 25M transistors (7M logic/18M array). The power supply is 1.9 V and the chip power is 33 W at 637 MHz. |
| doi_str_mv | 10.1109/ISSCC.2000.839707 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_839707</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>839707</ieee_id><sourcerecordid>839707</sourcerecordid><originalsourceid>FETCH-ieee_primary_8397073</originalsourceid><addsrcrecordid>eNp9jstKAzEUQC9awWn1A3R1f2Cmdxomj_WgtgtxMaXbMqS3EplJQhJB_XoFXbs6i8OBA3DXUtO2ZNa7Yej7ZkNEjRZGkbqAaiOUrLUkeQlLUppEpzuhF1BRa0QtO0HXsMz57SfqjNQVvChJ-Lz9wieJw1oYwtnZFGIKlnMOCfkjTsEV519xfp-KixPjoeDoT2hDjJzQ-cLJBu_ZlnwDV-dxynz7xxXcPz7s-23tmPkYk5vH9Hn8_RX_ym8mDD_x</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>McPherson, T. ; Averill, R. ; Balazich, D. ; Barkley, K. ; Carey, S. ; Chan, Y. ; Chan, Y.H. ; Crea, R. ; Dansky, A. ; Dwyer, R. ; Haen, A. ; Hoffman, D. ; Jatkowski, A. ; Mayo, M. ; Merrill, D. ; McNamara, T. ; Northrop, G. ; Rawlins, J. ; Sigal, L. ; Slegel, T. ; Webber, D. ; Williams, P. ; Yee, F.</creator><creatorcontrib>McPherson, T. ; Averill, R. ; Balazich, D. ; Barkley, K. ; Carey, S. ; Chan, Y. ; Chan, Y.H. ; Crea, R. ; Dansky, A. ; Dwyer, R. ; Haen, A. ; Hoffman, D. ; Jatkowski, A. ; Mayo, M. ; Merrill, D. ; McNamara, T. ; Northrop, G. ; Rawlins, J. ; Sigal, L. ; Slegel, T. ; Webber, D. ; Williams, P. ; Yee, F.</creatorcontrib><description>The G6 system is a sixth generation CMOS server for the S/390 line of products featuring a 12+2 SMP size and significant frequency improvements obtained through the use of low-Vt devices and copper interconnects. The microprocessor operates at 760 MHz at the fast end of the process distribution. The system ships at 637 MHz in a 12+2 chilled SMP configuration. Measured system performance on the 12 way is 1600 S/390 MIPs, providing over 50% more performance than the G5. This microprocessor uses CMOS7S technology, which has a 0.2 /spl mu/m process. The chip uses 6 levels of copper metal plus an additional layer of local interconnect on a 14.6/spl times/14.7 mm/sup 2/ die with 25M transistors (7M logic/18M array). The power supply is 1.9 V and the chip power is 33 W at 637 MHz.</description><identifier>ISSN: 0193-6530</identifier><identifier>ISBN: 0780358538</identifier><identifier>ISBN: 9780780358539</identifier><identifier>EISSN: 2376-8606</identifier><identifier>DOI: 10.1109/ISSCC.2000.839707</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS technology ; Copper ; Frequency ; Logic arrays ; Marine vehicles ; Microprocessors ; Power supplies ; Power system interconnection ; Semiconductor device measurement ; System performance</subject><ispartof>2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), 2000, p.96-97</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/839707$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,4040,4041,27916,54911</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/839707$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>McPherson, T.</creatorcontrib><creatorcontrib>Averill, R.</creatorcontrib><creatorcontrib>Balazich, D.</creatorcontrib><creatorcontrib>Barkley, K.</creatorcontrib><creatorcontrib>Carey, S.</creatorcontrib><creatorcontrib>Chan, Y.</creatorcontrib><creatorcontrib>Chan, Y.H.</creatorcontrib><creatorcontrib>Crea, R.</creatorcontrib><creatorcontrib>Dansky, A.</creatorcontrib><creatorcontrib>Dwyer, R.</creatorcontrib><creatorcontrib>Haen, A.</creatorcontrib><creatorcontrib>Hoffman, D.</creatorcontrib><creatorcontrib>Jatkowski, A.</creatorcontrib><creatorcontrib>Mayo, M.</creatorcontrib><creatorcontrib>Merrill, D.</creatorcontrib><creatorcontrib>McNamara, T.</creatorcontrib><creatorcontrib>Northrop, G.</creatorcontrib><creatorcontrib>Rawlins, J.</creatorcontrib><creatorcontrib>Sigal, L.</creatorcontrib><creatorcontrib>Slegel, T.</creatorcontrib><creatorcontrib>Webber, D.</creatorcontrib><creatorcontrib>Williams, P.</creatorcontrib><creatorcontrib>Yee, F.</creatorcontrib><title>760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects</title><title>2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056)</title><addtitle>ISSCC</addtitle><description>The G6 system is a sixth generation CMOS server for the S/390 line of products featuring a 12+2 SMP size and significant frequency improvements obtained through the use of low-Vt devices and copper interconnects. The microprocessor operates at 760 MHz at the fast end of the process distribution. The system ships at 637 MHz in a 12+2 chilled SMP configuration. Measured system performance on the 12 way is 1600 S/390 MIPs, providing over 50% more performance than the G5. This microprocessor uses CMOS7S technology, which has a 0.2 /spl mu/m process. The chip uses 6 levels of copper metal plus an additional layer of local interconnect on a 14.6/spl times/14.7 mm/sup 2/ die with 25M transistors (7M logic/18M array). The power supply is 1.9 V and the chip power is 33 W at 637 MHz.</description><subject>CMOS technology</subject><subject>Copper</subject><subject>Frequency</subject><subject>Logic arrays</subject><subject>Marine vehicles</subject><subject>Microprocessors</subject><subject>Power supplies</subject><subject>Power system interconnection</subject><subject>Semiconductor device measurement</subject><subject>System performance</subject><issn>0193-6530</issn><issn>2376-8606</issn><isbn>0780358538</isbn><isbn>9780780358539</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2000</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNp9jstKAzEUQC9awWn1A3R1f2Cmdxomj_WgtgtxMaXbMqS3EplJQhJB_XoFXbs6i8OBA3DXUtO2ZNa7Yej7ZkNEjRZGkbqAaiOUrLUkeQlLUppEpzuhF1BRa0QtO0HXsMz57SfqjNQVvChJ-Lz9wieJw1oYwtnZFGIKlnMOCfkjTsEV519xfp-KixPjoeDoT2hDjJzQ-cLJBu_ZlnwDV-dxynz7xxXcPz7s-23tmPkYk5vH9Hn8_RX_ym8mDD_x</recordid><startdate>2000</startdate><enddate>2000</enddate><creator>McPherson, T.</creator><creator>Averill, R.</creator><creator>Balazich, D.</creator><creator>Barkley, K.</creator><creator>Carey, S.</creator><creator>Chan, Y.</creator><creator>Chan, Y.H.</creator><creator>Crea, R.</creator><creator>Dansky, A.</creator><creator>Dwyer, R.</creator><creator>Haen, A.</creator><creator>Hoffman, D.</creator><creator>Jatkowski, A.</creator><creator>Mayo, M.</creator><creator>Merrill, D.</creator><creator>McNamara, T.</creator><creator>Northrop, G.</creator><creator>Rawlins, J.</creator><creator>Sigal, L.</creator><creator>Slegel, T.</creator><creator>Webber, D.</creator><creator>Williams, P.</creator><creator>Yee, F.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2000</creationdate><title>760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects</title><author>McPherson, T. ; Averill, R. ; Balazich, D. ; Barkley, K. ; Carey, S. ; Chan, Y. ; Chan, Y.H. ; Crea, R. ; Dansky, A. ; Dwyer, R. ; Haen, A. ; Hoffman, D. ; Jatkowski, A. ; Mayo, M. ; Merrill, D. ; McNamara, T. ; Northrop, G. ; Rawlins, J. ; Sigal, L. ; Slegel, T. ; Webber, D. ; Williams, P. ; Yee, F.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_8397073</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2000</creationdate><topic>CMOS technology</topic><topic>Copper</topic><topic>Frequency</topic><topic>Logic arrays</topic><topic>Marine vehicles</topic><topic>Microprocessors</topic><topic>Power supplies</topic><topic>Power system interconnection</topic><topic>Semiconductor device measurement</topic><topic>System performance</topic><toplevel>online_resources</toplevel><creatorcontrib>McPherson, T.</creatorcontrib><creatorcontrib>Averill, R.</creatorcontrib><creatorcontrib>Balazich, D.</creatorcontrib><creatorcontrib>Barkley, K.</creatorcontrib><creatorcontrib>Carey, S.</creatorcontrib><creatorcontrib>Chan, Y.</creatorcontrib><creatorcontrib>Chan, Y.H.</creatorcontrib><creatorcontrib>Crea, R.</creatorcontrib><creatorcontrib>Dansky, A.</creatorcontrib><creatorcontrib>Dwyer, R.</creatorcontrib><creatorcontrib>Haen, A.</creatorcontrib><creatorcontrib>Hoffman, D.</creatorcontrib><creatorcontrib>Jatkowski, A.</creatorcontrib><creatorcontrib>Mayo, M.</creatorcontrib><creatorcontrib>Merrill, D.</creatorcontrib><creatorcontrib>McNamara, T.</creatorcontrib><creatorcontrib>Northrop, G.</creatorcontrib><creatorcontrib>Rawlins, J.</creatorcontrib><creatorcontrib>Sigal, L.</creatorcontrib><creatorcontrib>Slegel, T.</creatorcontrib><creatorcontrib>Webber, D.</creatorcontrib><creatorcontrib>Williams, P.</creatorcontrib><creatorcontrib>Yee, F.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>McPherson, T.</au><au>Averill, R.</au><au>Balazich, D.</au><au>Barkley, K.</au><au>Carey, S.</au><au>Chan, Y.</au><au>Chan, Y.H.</au><au>Crea, R.</au><au>Dansky, A.</au><au>Dwyer, R.</au><au>Haen, A.</au><au>Hoffman, D.</au><au>Jatkowski, A.</au><au>Mayo, M.</au><au>Merrill, D.</au><au>McNamara, T.</au><au>Northrop, G.</au><au>Rawlins, J.</au><au>Sigal, L.</au><au>Slegel, T.</au><au>Webber, D.</au><au>Williams, P.</au><au>Yee, F.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects</atitle><btitle>2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056)</btitle><stitle>ISSCC</stitle><date>2000</date><risdate>2000</risdate><spage>96</spage><epage>97</epage><pages>96-97</pages><issn>0193-6530</issn><eissn>2376-8606</eissn><isbn>0780358538</isbn><isbn>9780780358539</isbn><abstract>The G6 system is a sixth generation CMOS server for the S/390 line of products featuring a 12+2 SMP size and significant frequency improvements obtained through the use of low-Vt devices and copper interconnects. The microprocessor operates at 760 MHz at the fast end of the process distribution. The system ships at 637 MHz in a 12+2 chilled SMP configuration. Measured system performance on the 12 way is 1600 S/390 MIPs, providing over 50% more performance than the G5. This microprocessor uses CMOS7S technology, which has a 0.2 /spl mu/m process. The chip uses 6 levels of copper metal plus an additional layer of local interconnect on a 14.6/spl times/14.7 mm/sup 2/ die with 25M transistors (7M logic/18M array). The power supply is 1.9 V and the chip power is 33 W at 637 MHz.</abstract><pub>IEEE</pub><doi>10.1109/ISSCC.2000.839707</doi></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0193-6530 |
| ispartof | 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), 2000, p.96-97 |
| issn | 0193-6530 2376-8606 |
| language | eng |
| recordid | cdi_ieee_primary_839707 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | CMOS technology Copper Frequency Logic arrays Marine vehicles Microprocessors Power supplies Power system interconnection Semiconductor device measurement System performance |
| title | 760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T02%3A15%3A36IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=760%20MHz%20G6%20S/390%20microprocessor%20exploiting%20multiple%20Vt%20and%20copper%20interconnects&rft.btitle=2000%20IEEE%20International%20Solid-State%20Circuits%20Conference.%20Digest%20of%20Technical%20Papers%20(Cat.%20No.00CH37056)&rft.au=McPherson,%20T.&rft.date=2000&rft.spage=96&rft.epage=97&rft.pages=96-97&rft.issn=0193-6530&rft.eissn=2376-8606&rft.isbn=0780358538&rft.isbn_list=9780780358539&rft_id=info:doi/10.1109/ISSCC.2000.839707&rft_dat=%3Cieee_6IE%3E839707%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=839707&rfr_iscdi=true |