A 6.75-8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier
A rapid ON/OFF LC-based fractional-N injection-locked clock multiplier (ILCM) is presented. The proposed architecture extends the merits of ILCMs to fractional-N operation. It employs a high-resolution digital-to-time converter to align the injected pulses to the oscillator's zero crossings. An...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2018-06, Vol.53 (6), p.1818-1829 |
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container_title | IEEE journal of solid-state circuits |
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creator | Elkholy, Ahmed Elmallah, Ahmed Ahmed, Mostafa Gamal Hanumolu, Pavan Kumar |
description | A rapid ON/OFF LC-based fractional-N injection-locked clock multiplier (ILCM) is presented. The proposed architecture extends the merits of ILCMs to fractional-N operation. It employs a high-resolution digital-to-time converter to align the injected pulses to the oscillator's zero crossings. An all-digital frequency-tracking loop continuously tunes the oscillator free-running frequency toward the target output frequency. The proposed clock multiplier can be powered ON from a completely OFF state almost instantaneously. Background calibration techniques ensure that robust operation across process, voltage, and temperature. Fabricated in 65-nm CMOS process with an active area of 0.27 mm 2 , the prototype ILCM generates output clock in the range of 6.75-8.25 GHz using a 115-MHz reference clock. It achieves integrated jitter performance of 109 fs rms (integer-N) and 177 fs rms (fractional-N), while consuming only 2.65 (integer-N) and 3.25 mW (fractional-N). This translates to the best-reported FoM J of −255 (integer-N) and −250 dB (fractional-N). The turn-on time is less than 4 ns in both the integer- and fractional-N modes, illustrating almost instantaneous settling. |
doi_str_mv | 10.1109/JSSC.2018.2810184 |
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The proposed architecture extends the merits of ILCMs to fractional-N operation. It employs a high-resolution digital-to-time converter to align the injected pulses to the oscillator's zero crossings. An all-digital frequency-tracking loop continuously tunes the oscillator free-running frequency toward the target output frequency. The proposed clock multiplier can be powered ON from a completely OFF state almost instantaneously. Background calibration techniques ensure that robust operation across process, voltage, and temperature. Fabricated in 65-nm CMOS process with an active area of 0.27 mm 2 , the prototype ILCM generates output clock in the range of 6.75-8.25 GHz using a 115-MHz reference clock. It achieves integrated jitter performance of 109 fs rms (integer-N) and 177 fs rms (fractional-N), while consuming only 2.65 (integer-N) and 3.25 mW (fractional-N). This translates to the best-reported FoM J of −255 (integer-N) and −250 dB (fractional-N). The turn-on time is less than 4 ns in both the integer- and fractional-N modes, illustrating almost instantaneous settling.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2018.2810184</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Clocks ; CMOS ; Converters ; Delays ; Digital PLL ; digital-to-time converter (DTC) ; digitally controlled oscillator (DCO) ; fractional-N ; Frequency conversion ; frequency synthesizer ; injection-locking ; Integers ; Jitter ; least-mean square (LMS) ; multiplying injection-locked oscillator (MILO) ; phase domain response (PDR) ; Phase locked loops ; Phase noise ; Phase-locked loop (PLL) ; sub-harmonic locking ; sub-sampling ; Vibration</subject><ispartof>IEEE journal of solid-state circuits, 2018-06, Vol.53 (6), p.1818-1829</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-d64d47e6cefbc93b77d9022211cdc1fc3a50dc8ce183114dbc410c70c5cfcc5f3</citedby><cites>FETCH-LOGICAL-c293t-d64d47e6cefbc93b77d9022211cdc1fc3a50dc8ce183114dbc410c70c5cfcc5f3</cites><orcidid>0000-0002-2636-4713 ; 0000-0002-3252-8585</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8322411$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8322411$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Elkholy, Ahmed</creatorcontrib><creatorcontrib>Elmallah, Ahmed</creatorcontrib><creatorcontrib>Ahmed, Mostafa Gamal</creatorcontrib><creatorcontrib>Hanumolu, Pavan Kumar</creatorcontrib><title>A 6.75-8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A rapid ON/OFF LC-based fractional-N injection-locked clock multiplier (ILCM) is presented. The proposed architecture extends the merits of ILCMs to fractional-N operation. It employs a high-resolution digital-to-time converter to align the injected pulses to the oscillator's zero crossings. An all-digital frequency-tracking loop continuously tunes the oscillator free-running frequency toward the target output frequency. The proposed clock multiplier can be powered ON from a completely OFF state almost instantaneously. Background calibration techniques ensure that robust operation across process, voltage, and temperature. Fabricated in 65-nm CMOS process with an active area of 0.27 mm 2 , the prototype ILCM generates output clock in the range of 6.75-8.25 GHz using a 115-MHz reference clock. It achieves integrated jitter performance of 109 fs rms (integer-N) and 177 fs rms (fractional-N), while consuming only 2.65 (integer-N) and 3.25 mW (fractional-N). This translates to the best-reported FoM J of −255 (integer-N) and −250 dB (fractional-N). The turn-on time is less than 4 ns in both the integer- and fractional-N modes, illustrating almost instantaneous settling.</description><subject>Clocks</subject><subject>CMOS</subject><subject>Converters</subject><subject>Delays</subject><subject>Digital PLL</subject><subject>digital-to-time converter (DTC)</subject><subject>digitally controlled oscillator (DCO)</subject><subject>fractional-N</subject><subject>Frequency conversion</subject><subject>frequency synthesizer</subject><subject>injection-locking</subject><subject>Integers</subject><subject>Jitter</subject><subject>least-mean square (LMS)</subject><subject>multiplying injection-locked oscillator (MILO)</subject><subject>phase domain response (PDR)</subject><subject>Phase locked loops</subject><subject>Phase noise</subject><subject>Phase-locked loop (PLL)</subject><subject>sub-harmonic locking</subject><subject>sub-sampling</subject><subject>Vibration</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kM1Kw0AUhQdRsFYfQNwMuJ507vzkZ1mLaSv9AaugqyG9M4HU2MQkXegTuPYRfRKnVlwdzuWcw-Uj5BJ4AMCTwd1qNQoEhzgQMXhRR6QHWscMIvl0THrc31giOD8lZ2278VapGHrkeUjDINLM9zQbTz7o9-eX0JzZG5pWc3qf1YWly8VgmaY0bTLsimqblWxBp9uN-3VsVuGLs3RUeqXzXdkVdVm45pyc5FnZuos_7ZPH9PZhNGGz5Xg6Gs4YikR2zIbKqsiF6PI1JnIdRTbhQggAtAg5ykxzizE6iCWAsmtUwDHiqDFH1Lnsk-vDbt1UbzvXdmZT7Rr_ZGuESBIVhkppn4JDCpuqbRuXm7opXrPm3QA3e4JmT9DsCZo_gr5zdegUzrn_fCyFUADyB6U9ack</recordid><startdate>20180601</startdate><enddate>20180601</enddate><creator>Elkholy, Ahmed</creator><creator>Elmallah, Ahmed</creator><creator>Ahmed, Mostafa Gamal</creator><creator>Hanumolu, Pavan Kumar</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-2636-4713</orcidid><orcidid>https://orcid.org/0000-0002-3252-8585</orcidid></search><sort><creationdate>20180601</creationdate><title>A 6.75-8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier</title><author>Elkholy, Ahmed ; Elmallah, Ahmed ; Ahmed, Mostafa Gamal ; Hanumolu, Pavan Kumar</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c293t-d64d47e6cefbc93b77d9022211cdc1fc3a50dc8ce183114dbc410c70c5cfcc5f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>Clocks</topic><topic>CMOS</topic><topic>Converters</topic><topic>Delays</topic><topic>Digital PLL</topic><topic>digital-to-time converter (DTC)</topic><topic>digitally controlled oscillator (DCO)</topic><topic>fractional-N</topic><topic>Frequency conversion</topic><topic>frequency synthesizer</topic><topic>injection-locking</topic><topic>Integers</topic><topic>Jitter</topic><topic>least-mean square (LMS)</topic><topic>multiplying injection-locked oscillator (MILO)</topic><topic>phase domain response (PDR)</topic><topic>Phase locked loops</topic><topic>Phase noise</topic><topic>Phase-locked loop (PLL)</topic><topic>sub-harmonic locking</topic><topic>sub-sampling</topic><topic>Vibration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Elkholy, Ahmed</creatorcontrib><creatorcontrib>Elmallah, Ahmed</creatorcontrib><creatorcontrib>Ahmed, Mostafa Gamal</creatorcontrib><creatorcontrib>Hanumolu, Pavan Kumar</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Elkholy, Ahmed</au><au>Elmallah, Ahmed</au><au>Ahmed, Mostafa Gamal</au><au>Hanumolu, Pavan Kumar</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 6.75-8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2018-06-01</date><risdate>2018</risdate><volume>53</volume><issue>6</issue><spage>1818</spage><epage>1829</epage><pages>1818-1829</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A rapid ON/OFF LC-based fractional-N injection-locked clock multiplier (ILCM) is presented. The proposed architecture extends the merits of ILCMs to fractional-N operation. It employs a high-resolution digital-to-time converter to align the injected pulses to the oscillator's zero crossings. An all-digital frequency-tracking loop continuously tunes the oscillator free-running frequency toward the target output frequency. The proposed clock multiplier can be powered ON from a completely OFF state almost instantaneously. Background calibration techniques ensure that robust operation across process, voltage, and temperature. Fabricated in 65-nm CMOS process with an active area of 0.27 mm 2 , the prototype ILCM generates output clock in the range of 6.75-8.25 GHz using a 115-MHz reference clock. It achieves integrated jitter performance of 109 fs rms (integer-N) and 177 fs rms (fractional-N), while consuming only 2.65 (integer-N) and 3.25 mW (fractional-N). This translates to the best-reported FoM J of −255 (integer-N) and −250 dB (fractional-N). The turn-on time is less than 4 ns in both the integer- and fractional-N modes, illustrating almost instantaneous settling.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JSSC.2018.2810184</doi><tpages>12</tpages><orcidid>https://orcid.org/0000-0002-2636-4713</orcidid><orcidid>https://orcid.org/0000-0002-3252-8585</orcidid></addata></record> |
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subjects | Clocks CMOS Converters Delays Digital PLL digital-to-time converter (DTC) digitally controlled oscillator (DCO) fractional-N Frequency conversion frequency synthesizer injection-locking Integers Jitter least-mean square (LMS) multiplying injection-locked oscillator (MILO) phase domain response (PDR) Phase locked loops Phase noise Phase-locked loop (PLL) sub-harmonic locking sub-sampling Vibration |
title | A 6.75-8.25-GHz −250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier |
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