Transistor characteristics of 14-nm-gate-length EJ-MOSFETs
We have fabricated electrically variable shallow junction metal-oxide-silicon field-effect transistors (EJ-MOSFETs) to investigate transport characteristics of ultrafine gate MOSFETs. By using EB direct writing on an ultrahigh-resolution negative resist (calixarene), we could achieved a gate length...
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Veröffentlicht in: | IEEE transactions on electron devices 2000-04, Vol.47 (4), p.856-860 |
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creator | Kawaura, H. Sakamoto, T. Baba, T. Ochiai, Y. Fujita, J. Sone, J. |
description | We have fabricated electrically variable shallow junction metal-oxide-silicon field-effect transistors (EJ-MOSFETs) to investigate transport characteristics of ultrafine gate MOSFETs. By using EB direct writing on an ultrahigh-resolution negative resist (calixarene), we could achieved a gate length of only 14 nm. Despite such an ultrafine gate, the device exhibited transistor operation at room temperature. From studying the devices with the gate lengths from 14 nm to 98 nm, we found that when the gate length was below 30 nm the subthreshold leakage current increased. The low-temperature measurements showed that the leakage current was caused by the classical thermal process and that quantum effects do not play an important role in subthreshold characteristics at room temperature. |
doi_str_mv | 10.1109/16.831004 |
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By using EB direct writing on an ultrahigh-resolution negative resist (calixarene), we could achieved a gate length of only 14 nm. Despite such an ultrafine gate, the device exhibited transistor operation at room temperature. From studying the devices with the gate lengths from 14 nm to 98 nm, we found that when the gate length was below 30 nm the subthreshold leakage current increased. The low-temperature measurements showed that the leakage current was caused by the classical thermal process and that quantum effects do not play an important role in subthreshold characteristics at room temperature.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/16.831004</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Devices ; Electrical junctions ; Gates ; Leakage current ; MOSFETs ; Semiconductor devices ; Transistors ; Transport</subject><ispartof>IEEE transactions on electron devices, 2000-04, Vol.47 (4), p.856-860</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2000</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c464t-44aebb31485e64ee72536c8e3a473cf25e5078b7386747a70501fe3ba89e401a3</citedby><cites>FETCH-LOGICAL-c464t-44aebb31485e64ee72536c8e3a473cf25e5078b7386747a70501fe3ba89e401a3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/831004$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/831004$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kawaura, H.</creatorcontrib><creatorcontrib>Sakamoto, T.</creatorcontrib><creatorcontrib>Baba, T.</creatorcontrib><creatorcontrib>Ochiai, Y.</creatorcontrib><creatorcontrib>Fujita, J.</creatorcontrib><creatorcontrib>Sone, J.</creatorcontrib><title>Transistor characteristics of 14-nm-gate-length EJ-MOSFETs</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>We have fabricated electrically variable shallow junction metal-oxide-silicon field-effect transistors (EJ-MOSFETs) to investigate transport characteristics of ultrafine gate MOSFETs. By using EB direct writing on an ultrahigh-resolution negative resist (calixarene), we could achieved a gate length of only 14 nm. Despite such an ultrafine gate, the device exhibited transistor operation at room temperature. From studying the devices with the gate lengths from 14 nm to 98 nm, we found that when the gate length was below 30 nm the subthreshold leakage current increased. The low-temperature measurements showed that the leakage current was caused by the classical thermal process and that quantum effects do not play an important role in subthreshold characteristics at room temperature.</description><subject>Devices</subject><subject>Electrical junctions</subject><subject>Gates</subject><subject>Leakage current</subject><subject>MOSFETs</subject><subject>Semiconductor devices</subject><subject>Transistors</subject><subject>Transport</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2000</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqF0TtPw0AMAOATAolSGFiZIgYQw5V7-B5hQ1V5qagDZY4uJ6dN1SblLh349xxKxcAAk2X7kyXbhJxzNuKc5bdcj6zkjMEBGXClDM016EMyYIxbmksrj8lJjKuUagAxIHfz4JpYx64NmV-64HyHIaW1j1lbZRxos6EL1yFdY7Poltnkhb7O3h4m83hKjiq3jni2j0PynsrjJzqdPT6P76fUg4aOAjgsS8nBKtSAaISS2luUDoz0lVComLGlkVYbMM4wxXiFsnQ2R2DcySG57uduQ_uxw9gVmzp6XK9dg-0uFjkHLfK0fJJXf0qRM6Olhf-hNVIowf6HWnOhrE7w8hdctbvQpLsU1iohtBEioZse-dDGGLAqtqHeuPBZcFZ8v6_guujfl-xFb2tE_HH75hfj7pB8</recordid><startdate>20000401</startdate><enddate>20000401</enddate><creator>Kawaura, H.</creator><creator>Sakamoto, T.</creator><creator>Baba, T.</creator><creator>Ochiai, Y.</creator><creator>Fujita, J.</creator><creator>Sone, J.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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By using EB direct writing on an ultrahigh-resolution negative resist (calixarene), we could achieved a gate length of only 14 nm. Despite such an ultrafine gate, the device exhibited transistor operation at room temperature. From studying the devices with the gate lengths from 14 nm to 98 nm, we found that when the gate length was below 30 nm the subthreshold leakage current increased. The low-temperature measurements showed that the leakage current was caused by the classical thermal process and that quantum effects do not play an important role in subthreshold characteristics at room temperature.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/16.831004</doi><tpages>5</tpages></addata></record> |
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subjects | Devices Electrical junctions Gates Leakage current MOSFETs Semiconductor devices Transistors Transport |
title | Transistor characteristics of 14-nm-gate-length EJ-MOSFETs |
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