A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling

This paper introduces a high-order continuous-time (CT) delta-sigma modulator (DSM) that applies digital-domain noise coupling (DNC) based on the structural advantages of the successive-approximation register (SAR) analog-to-digital converter (ADC), which makes the implementation of second-order noi...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2018-04, Vol.53 (4), p.1139-1148
Hauptverfasser:	Jang, Il-Hoon, Seo, Min-Jae, Cho, Sang-Hyun, Lee, Jae-Keun, Baek, Seung-Yeob, Kwon, Sunwoo, Choi, Michael, Ko, Hyung-Jong, Ryu, Seung-Tak
Format:	Artikel
Sprache:	eng
Schlagworte:	Analog to digital conversion Analog to digital converters Analog-to-digital converter (ADC) Capacitors Circuit design Circuits CMOS Complexity theory continuous-time delta-sigma modulator (CT DSM) Coupling Couplings Digital to analog converters digital-domain noise coupling (DNC) High definition video Linearity Modulation Noise noise coupling Noise levels Noise shaping Oversampling Power consumption Quantization (signal) successive-approximation register (SAR) tri-level data-weight averaging (TDWA)
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